switch (ireg) {
imsic_read_switchcase_64(IMSIC_EIP0)
imsic_read_switchcase_64(IMSIC_EIE0)
- };
+ }
return 0;
}
switch (ireg) {
imsic_swap_switchcase_64(IMSIC_EIP0, val)
imsic_swap_switchcase_64(IMSIC_EIE0, val)
- };
+ }
return 0;
}
switch (ireg) {
imsic_write_switchcase_64(IMSIC_EIP0, val)
imsic_write_switchcase_64(IMSIC_EIE0, val)
- };
+ }
}
#define imsic_vs_csr_set(__c, __v) \
switch (ireg) {
imsic_set_switchcase_64(IMSIC_EIP0, val)
imsic_set_switchcase_64(IMSIC_EIE0, val)
- };
+ }
}
static unsigned long imsic_mrif_atomic_rmw(struct imsic_mrif *mrif,
break;
default:
return -ENOENT;
- };
+ }
#ifndef CONFIG_32BIT
if (num & 0x1)
return -EINVAL;
break;
default:
return -ENOENT;
- };
+ }
if (val)
*val = old_val;