ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
authorVipul Kumar Samar <vipulkumar.samar@st.com>
Wed, 17 Oct 2012 06:38:26 +0000 (12:08 +0530)
committerViresh Kumar <viresh.kumar@linaro.org>
Mon, 26 Nov 2012 11:25:30 +0000 (16:55 +0530)
This patch moves some global macro definitions to the files where they are used.
Its a step towards removing spear.h completely later on.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
arch/arm/mach-spear13xx/include/mach/spear.h
arch/arm/mach-spear13xx/spear1310.c
drivers/clk/spear/spear1310_clock.c

index 07d90ac..7cfa681 100644 (file)
 #define DMAC1_BASE                             UL(0xEB000000)
 #define MCIF_CF_BASE                           UL(0xB2800000)
 
-/* Devices present in SPEAr1310 */
-#ifdef CONFIG_MACH_SPEAR1310
-#define SPEAR1310_RAS_GRP1_BASE                        UL(0xD8000000)
-#define VA_SPEAR1310_RAS_GRP1_BASE             UL(0xFA000000)
-#define SPEAR1310_RAS_BASE                     UL(0xD8400000)
-#define VA_SPEAR1310_RAS_BASE                  IOMEM(UL(0xFA400000))
-#endif /* CONFIG_MACH_SPEAR1310 */
-
 /* Debug uart for linux, will be used for debug and uncompress messages */
 #define SPEAR_DBG_UART_BASE                    UART_BASE
 #define VA_SPEAR_DBG_UART_BASE                 VA_UART_BASE
index 9fbbfc5..593a756 100644 (file)
 #define SPEAR1310_SATA1_BASE                   UL(0xB1800000)
 #define SPEAR1310_SATA2_BASE                   UL(0xB4000000)
 
+#define SPEAR1310_RAS_GRP1_BASE                        UL(0xD8000000)
+#define VA_SPEAR1310_RAS_GRP1_BASE             UL(0xFA000000)
+#define SPEAR1310_RAS_BASE                     UL(0xD8400000)
+#define VA_SPEAR1310_RAS_BASE                  IOMEM(UL(0xFA400000))
+
 /* ssp device registration */
 static struct pl022_ssp_controller ssp1_plat_data = {
        .bus_id = 0,
index 0fcec2a..cf7e176 100644 (file)
@@ -20,6 +20,7 @@
 #include <mach/spear.h>
 #include "clk.h"
 
+#define VA_SPEAR1310_RAS_BASE                  IOMEM(UL(0xFA400000))
 /* PLL related registers and bit values */
 #define SPEAR1310_PLL_CFG                      (VA_MISC_BASE + 0x210)
        /* PLL_CFG bit values */