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drm/i915: handle 3rd pipe
author
Eugeni Dodonov
<eugeni.dodonov@intel.com>
Sun, 8 Jan 2012 01:40:35 +0000
(23:40 -0200)
committer
Keith Packard
<keithp@keithp.com>
Mon, 9 Jan 2012 22:17:53 +0000
(14:17 -0800)
We don't need to check 3rd pipe specifically, as it shares PLL with some
other one.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
drivers/gpu/drm/i915/i915_suspend.c
patch
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diff --git
a/drivers/gpu/drm/i915/i915_suspend.c
b/drivers/gpu/drm/i915/i915_suspend.c
index
c0b945c
..
30d924f
100644
(file)
--- a/
drivers/gpu/drm/i915/i915_suspend.c
+++ b/
drivers/gpu/drm/i915/i915_suspend.c
@@
-35,6
+35,10
@@
static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
struct drm_i915_private *dev_priv = dev->dev_private;
u32 dpll_reg;
+ /* On IVB, 3rd pipe shares PLL with another one */
+ if (pipe > 1)
+ return false;
+
if (HAS_PCH_SPLIT(dev))
dpll_reg = PCH_DPLL(pipe);
else