MIPS: small test-case fix for chaining of fixup position.

Add nops to the branch-delay slots of the 'beq' and 'bne' instructions
used in the test-case. Having a branch instruction in the branch-delay-slot
of another branch is undefined on mips.

In regular code we avoid this by using the Branch() macro-instruction which
fills the branch-delay-slot with nop() automatically, unless the programmer
asks to use it (via USE_BRANCH_DELAY).

There is more info about branch-delay-slots on this page, and in the ISA
reference also on the page:

https://github.com/paul99/v8m-rb/wiki/MIPS-instruction-set-and-v8

BUG=
TEST=
Review URL: http://codereview.chromium.org/7812019

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@9079 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

diff --git a/test/cctest/test-assembler-mips.cc b/test/cctest/test-assembler-mips.cc
index ca11a2a..cbaa3be 100644 (file)
--- a/test/cctest/test-assembler-mips.cc
+++ b/test/cctest/test-assembler-mips.cc
@@ -1268,7 +1268,9 @@ TEST(MIPS15) {
 
   Label target;
   __ beq(v0, v1, &target);
+  __ nop();
   __ bne(v0, v1, &target);
+  __ nop();
   __ bind(&target);
   __ nop();
 }