+2014-02-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/55426
+ * config/arm/arm.h (CANNOT_CHANGE_MODE_CLASS): Allow 128 to 64-bit
+ conversions.
+
2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PREFETCHWT1_SET),
VFPv2.
In big-endian mode, modes greater than word size (i.e. DFmode) are stored in
VFP registers in little-endian order. We can't describe that accurately to
- GCC, so avoid taking subregs of such values. */
-#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
- (TARGET_VFP && TARGET_BIG_END \
- && (GET_MODE_SIZE (FROM) > UNITS_PER_WORD \
- || GET_MODE_SIZE (TO) > UNITS_PER_WORD) \
+ GCC, so avoid taking subregs of such values.
+ The only exception is going from a 128-bit to a 64-bit type. In that case
+ the data layout happens to be consistent for big-endian, so we explicitly allow
+ that case. */
+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
+ (TARGET_VFP && TARGET_BIG_END \
+ && !(GET_MODE_SIZE (FROM) == 16 && GET_MODE_SIZE (TO) == 8) \
+ && (GET_MODE_SIZE (FROM) > UNITS_PER_WORD \
+ || GET_MODE_SIZE (TO) > UNITS_PER_WORD) \
&& reg_classes_intersect_p (VFP_REGS, (CLASS)))
/* The class value for index registers, and the one for base regs. */