ARM: at91: remove unused headers
authorAlexandre Belloni <alexandre.belloni@free-electrons.com>
Fri, 13 Mar 2015 21:57:20 +0000 (22:57 +0100)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Thu, 19 Mar 2015 15:37:44 +0000 (16:37 +0100)
Following the switch to multiplatform, uncompress.h is not used anymore. Remove
it.
at91_dbgu.h is also not used anymore

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/mach-at91/include/mach/at91_dbgu.h [deleted file]
arch/arm/mach-at91/include/mach/uncompress.h [deleted file]

diff --git a/arch/arm/mach-at91/include/mach/at91_dbgu.h b/arch/arm/mach-at91/include/mach/at91_dbgu.h
deleted file mode 100644 (file)
index 42925e8..0000000
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91_dbgu.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * Debug Unit (DBGU) - System peripherals registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91_DBGU_H
-#define AT91_DBGU_H
-
-#define AT91_DBGU_CR           (0x00)  /* Control Register */
-#define AT91_DBGU_MR           (0x04)  /* Mode Register */
-#define AT91_DBGU_IER          (0x08)  /* Interrupt Enable Register */
-#define                AT91_DBGU_TXRDY         (1 << 1)                /* Transmitter Ready */
-#define                AT91_DBGU_TXEMPTY       (1 << 9)                /* Transmitter Empty */
-#define AT91_DBGU_IDR          (0x0c)  /* Interrupt Disable Register */
-#define AT91_DBGU_IMR          (0x10)  /* Interrupt Mask Register */
-#define AT91_DBGU_SR           (0x14)  /* Status Register */
-#define AT91_DBGU_RHR          (0x18)  /* Receiver Holding Register */
-#define AT91_DBGU_THR          (0x1c)  /* Transmitter Holding Register */
-#define AT91_DBGU_BRGR         (0x20)  /* Baud Rate Generator Register */
-
-#define AT91_DBGU_CIDR         (0x40)  /* Chip ID Register */
-#define AT91_DBGU_EXID         (0x44)  /* Chip ID Extension Register */
-#define AT91_DBGU_FNR          (0x48)  /* Force NTRST Register [SAM9 only] */
-#define                AT91_DBGU_FNTRST        (1 << 0)                /* Force NTRST */
-
-/*
- * Some AT91 parts that don't have full DEBUG units still support the ID
- * and extensions register.
- */
-#define                AT91_CIDR_VERSION       (0x1f << 0)             /* Version of the Device */
-#define                AT91_CIDR_EPROC         (7    << 5)             /* Embedded Processor */
-#define                AT91_CIDR_NVPSIZ        (0xf  << 8)             /* Nonvolatile Program Memory Size */
-#define                AT91_CIDR_NVPSIZ2       (0xf  << 12)            /* Second Nonvolatile Program Memory Size */
-#define                AT91_CIDR_SRAMSIZ       (0xf  << 16)            /* Internal SRAM Size */
-#define                        AT91_CIDR_SRAMSIZ_1K    (1 << 16)
-#define                        AT91_CIDR_SRAMSIZ_2K    (2 << 16)
-#define                        AT91_CIDR_SRAMSIZ_112K  (4 << 16)
-#define                        AT91_CIDR_SRAMSIZ_4K    (5 << 16)
-#define                        AT91_CIDR_SRAMSIZ_80K   (6 << 16)
-#define                        AT91_CIDR_SRAMSIZ_160K  (7 << 16)
-#define                        AT91_CIDR_SRAMSIZ_8K    (8 << 16)
-#define                        AT91_CIDR_SRAMSIZ_16K   (9 << 16)
-#define                        AT91_CIDR_SRAMSIZ_32K   (10 << 16)
-#define                        AT91_CIDR_SRAMSIZ_64K   (11 << 16)
-#define                        AT91_CIDR_SRAMSIZ_128K  (12 << 16)
-#define                        AT91_CIDR_SRAMSIZ_256K  (13 << 16)
-#define                        AT91_CIDR_SRAMSIZ_96K   (14 << 16)
-#define                        AT91_CIDR_SRAMSIZ_512K  (15 << 16)
-#define                AT91_CIDR_ARCH          (0xff << 20)            /* Architecture Identifier */
-#define                AT91_CIDR_NVPTYP        (7    << 28)            /* Nonvolatile Program Memory Type */
-#define                AT91_CIDR_EXT           (1    << 31)            /* Extension Flag */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/uncompress.h b/arch/arm/mach-at91/include/mach/uncompress.h
deleted file mode 100644 (file)
index 4ebb609..0000000
+++ /dev/null
@@ -1,218 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/uncompress.h
- *
- * Copyright (C) 2003 SAN People
- * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#ifndef __ASM_ARCH_UNCOMPRESS_H
-#define __ASM_ARCH_UNCOMPRESS_H
-
-#include <linux/io.h>
-#include <linux/atmel_serial.h>
-#include <mach/hardware.h>
-
-#include <mach/at91_dbgu.h>
-#include <mach/cpu.h>
-
-void __iomem *at91_uart;
-
-static const u32 uarts_rm9200[] = {
-       AT91_BASE_DBGU0,
-       AT91RM9200_BASE_US0,
-       AT91RM9200_BASE_US1,
-       AT91RM9200_BASE_US2,
-       AT91RM9200_BASE_US3,
-       0,
-};
-
-static const u32 uarts_sam9260[] = {
-       AT91_BASE_DBGU0,
-       AT91SAM9260_BASE_US0,
-       AT91SAM9260_BASE_US1,
-       AT91SAM9260_BASE_US2,
-       AT91SAM9260_BASE_US3,
-       AT91SAM9260_BASE_US4,
-       AT91SAM9260_BASE_US5,
-       0,
-};
-
-static const u32 uarts_sam9261[] = {
-       AT91_BASE_DBGU0,
-       AT91SAM9261_BASE_US0,
-       AT91SAM9261_BASE_US1,
-       AT91SAM9261_BASE_US2,
-       0,
-};
-
-static const u32 uarts_sam9263[] = {
-       AT91_BASE_DBGU1,
-       AT91SAM9263_BASE_US0,
-       AT91SAM9263_BASE_US1,
-       AT91SAM9263_BASE_US2,
-       0,
-};
-
-static const u32 uarts_sam9g45[] = {
-       AT91_BASE_DBGU1,
-       AT91SAM9G45_BASE_US0,
-       AT91SAM9G45_BASE_US1,
-       AT91SAM9G45_BASE_US2,
-       AT91SAM9G45_BASE_US3,
-       0,
-};
-
-static const u32 uarts_sam9rl[] = {
-       AT91_BASE_DBGU0,
-       AT91SAM9RL_BASE_US0,
-       AT91SAM9RL_BASE_US1,
-       AT91SAM9RL_BASE_US2,
-       AT91SAM9RL_BASE_US3,
-       0,
-};
-
-static const u32 uarts_sam9x5[] = {
-       AT91_BASE_DBGU0,
-       AT91SAM9X5_BASE_USART0,
-       AT91SAM9X5_BASE_USART1,
-       AT91SAM9X5_BASE_USART2,
-       0,
-};
-
-static const u32 uarts_sama5d3[] = {
-       AT91_BASE_DBGU1,
-       SAMA5D3_BASE_USART0,
-       SAMA5D3_BASE_USART1,
-       SAMA5D3_BASE_USART2,
-       SAMA5D3_BASE_USART3,
-       0,
-};
-
-static const u32 uarts_sama5d4[] = {
-       AT91_BASE_DBGU2,
-       SAMA5D4_BASE_USART3,
-       0,
-};
-
-static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
-{
-       u32 cidr, socid;
-
-       cidr = __raw_readl(dbgu_base + AT91_DBGU_CIDR);
-       socid = cidr & ~AT91_CIDR_VERSION;
-
-       switch (socid) {
-       case ARCH_ID_AT91RM9200:
-               return uarts_rm9200;
-
-       case ARCH_ID_AT91SAM9G20:
-       case ARCH_ID_AT91SAM9260:
-               return uarts_sam9260;
-
-       case ARCH_ID_AT91SAM9261:
-               return uarts_sam9261;
-
-       case ARCH_ID_AT91SAM9263:
-               return uarts_sam9263;
-
-       case ARCH_ID_AT91SAM9G45:
-               return uarts_sam9g45;
-
-       case ARCH_ID_AT91SAM9RL64:
-               return uarts_sam9rl;
-
-       case ARCH_ID_AT91SAM9N12:
-       case ARCH_ID_AT91SAM9X5:
-               return uarts_sam9x5;
-
-       case ARCH_ID_SAMA5:
-               cidr = __raw_readl(dbgu_base + AT91_DBGU_EXID);
-               if (cidr & ARCH_EXID_SAMA5D3)
-                       return uarts_sama5d3;
-               else if (cidr & ARCH_EXID_SAMA5D4)
-                       return uarts_sama5d4;
-
-               break;
-       }
-
-       /* at91sam9g10 */
-       if ((cidr & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
-               return uarts_sam9261;
-       }
-       /* at91sam9xe */
-       else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
-               return uarts_sam9260;
-       }
-
-       return NULL;
-}
-
-static inline void arch_decomp_setup(void)
-{
-       int i = 0;
-       const u32* usarts;
-
-       usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU0);
-       if (!usarts)
-               usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU1);
-       if (!usarts)
-               usarts = decomp_soc_detect((void __iomem *)AT91_BASE_DBGU2);
-       if (!usarts) {
-               at91_uart = NULL;
-               return;
-       }
-
-       do {
-               /* physical address */
-               at91_uart = (void __iomem *)usarts[i];
-
-               if (__raw_readl(at91_uart + ATMEL_US_BRGR))
-                       return;
-               i++;
-       } while (usarts[i]);
-
-       at91_uart = NULL;
-}
-
-/*
- * The following code assumes the serial port has already been
- * initialized by the bootloader.  If you didn't setup a port in
- * your bootloader then nothing will appear (which might be desired).
- *
- * This does not append a newline
- */
-static void putc(int c)
-{
-       if (!at91_uart)
-               return;
-
-       while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXRDY))
-               barrier();
-       __raw_writel(c, at91_uart + ATMEL_US_THR);
-}
-
-static inline void flush(void)
-{
-       if (!at91_uart)
-               return;
-
-       /* wait for transmission to complete */
-       while (!(__raw_readl(at91_uart + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
-               barrier();
-}
-
-#endif