drm/amd/display: Check link_active instead of lane_settings != unknown
authorJoshua Aberback <joshua.aberback@amd.com>
Tue, 17 Nov 2020 16:27:33 +0000 (11:27 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 1 Dec 2020 21:03:27 +0000 (16:03 -0500)
[Why]
enable_link_dp_mst checks that cur_link_settings != unknown to determine
that the link is already enabled, to skip redundant enablement calls for
multiple streams on the same link. During dc_reinitialize_hardware,
cur_link_settings on previously-active links is not cleared, which blocks
MST links from being re-enabled after a reinitialization.

[How]
 - check for link_status->link_active instead, as it's the real intent
 - clear cur_link_settings when we clear link_active

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

index 4a897c3..a9c5265 100644 (file)
@@ -1738,7 +1738,7 @@ static enum dc_status enable_link_dp_mst(
        /* sink signal type after MST branch is MST. Multiple MST sinks
         * share one link. Link DP PHY is enable or training only once.
         */
-       if (link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN)
+       if (link->link_status.link_active)
                return DC_OK;
 
        /* clear payload table */
index 90c85b3..4c230f1 100644 (file)
@@ -1530,6 +1530,8 @@ static void power_down_encoders(struct dc *dc)
                                dc->links[i]->link_enc, signal);
 
                dc->links[i]->link_status.link_active = false;
+               memset(&dc->links[i]->cur_link_settings, 0,
+                               sizeof(dc->links[i]->cur_link_settings));
        }
 }