+Sat Jan 16 12:47:15 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
+
+ * config/c4x/c4x.md (not_repeat_reg): Allow ldp instruction
+ in delay slot of RPTBD.
+
+Sat Jan 16 12:26:40 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
+
+ * config/c4x/libgcc.S (___divhi3, ___modhi3): Fix long long
+ divide and modulo sign problem.
+
Fri Jan 15 11:02:31 1999 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
* unroll.c (loop_iterations): Return 0 if the last loop insn
(const_string "false")))
(define_attr "not_repeat_reg" "false,true"
- (cond [(eq_attr "type" "unary,unarycc,compare,lda,store")
+ (cond [(eq_attr "type" "unary,unarycc,compare,lda,ldp,store")
(if_then_else (and (match_operand 0 "not_rc_reg" "")
(match_operand 1 "not_rc_reg" ""))
(const_string "true") (const_string "false"))
(const_string "true") (const_string "false"))]
(const_string "false")))
+/* Disable compare because the c4x contains a bug. The cmpi insn sets the CC
+ in the read phase of the pipeline instead of the execution phase when
+ two registers are compared. */
(define_attr "in_annul_slot_1" "false,true"
(if_then_else (and (and (eq_attr "cpu" "c4x")
(eq_attr "type" "!jump,call,rets,jmpc,compare,db,dbc,repeat,repeat_top,laj,push,pop,lda,ldp,multi"))