drm/amd/powerplay: simplify struct amd_pp_init.
authorRex Zhu <Rex.Zhu@amd.com>
Mon, 22 Aug 2016 12:47:28 +0000 (20:47 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 25 Aug 2016 16:23:41 +0000 (12:23 -0400)
delete the members not needed when amd_powerplay_init.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c
drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
drivers/gpu/drm/amd/powerplay/inc/smumgr.h
drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c

index 5450744..ecc4141 100644 (file)
@@ -52,10 +52,6 @@ static int amdgpu_powerplay_init(struct amdgpu_device *adev)
                pp_init->chip_family = adev->family;
                pp_init->chip_id = adev->asic_type;
                pp_init->device = amdgpu_cgs_create_device(adev);
-               pp_init->rev_id = adev->pdev->revision;
-               pp_init->sub_sys_id = adev->pdev->subsystem_device;
-               pp_init->sub_vendor_id = adev->pdev->subsystem_vendor;
-
                ret = amd_powerplay_init(pp_init, amd_pp);
                kfree(pp_init);
 #endif
index d829076..50d465d 100644 (file)
@@ -76,9 +76,6 @@ int hwmgr_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
        hwmgr->device = pp_init->device;
        hwmgr->chip_family = pp_init->chip_family;
        hwmgr->chip_id = pp_init->chip_id;
-       hwmgr->hw_revision = pp_init->rev_id;
-       hwmgr->sub_sys_id = pp_init->sub_sys_id;
-       hwmgr->sub_vendor_id = pp_init->sub_vendor_id;
        hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT;
        hwmgr->power_source = PP_PowerSource_AC;
 
index 3f8172f..18f39e8 100644 (file)
@@ -131,9 +131,6 @@ struct amd_pp_init {
        struct cgs_device *device;
        uint32_t chip_family;
        uint32_t chip_id;
-       uint32_t rev_id;
-       uint16_t sub_sys_id;
-       uint16_t sub_vendor_id;
 };
 
 enum amd_pp_display_config_type{
index 36b4ec9..aca94e0 100644 (file)
@@ -579,9 +579,6 @@ struct phm_microcode_version_info {
 struct pp_hwmgr {
        uint32_t chip_family;
        uint32_t chip_id;
-       uint32_t hw_revision;
-       uint32_t sub_sys_id;
-       uint32_t sub_vendor_id;
 
        void *device;
        struct pp_smumgr *smumgr;
index 3c235f0..dede153 100644 (file)
@@ -74,7 +74,6 @@ struct pp_smumgr_func {
 struct pp_smumgr {
        uint32_t chip_family;
        uint32_t chip_id;
-       uint32_t hw_revision;
        void *device;
        void *backend;
        uint32_t usec_timeout;
index cf3cabe..e6dc95d 100644 (file)
@@ -48,7 +48,6 @@ int smum_init(struct amd_pp_init *pp_init, struct pp_instance *handle)
        smumgr->device = pp_init->device;
        smumgr->chip_family = pp_init->chip_family;
        smumgr->chip_id = pp_init->chip_id;
-       smumgr->hw_revision = pp_init->rev_id;
        smumgr->usec_timeout = AMD_MAX_USEC_TIMEOUT;
        smumgr->reload_fw = 1;
        handle->smu_mgr = smumgr;