Pass floating point constant moves to integer registers

as mov immediates for Thumb1.

2009-12-23  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

        PR target/40670
        * config/arm/arm.md: Split for Thumb1 as well.

        * gcc.target/arm/pr40670.c: New test.

From-SVN: r155427

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3b14a38..c22b10f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2009-12-23  Ramana Radhakrishnan  <ramrad01@arm.com>
+
+       PR target/40670
+       * config/arm/arm.md: Split for Thumb1 as well.
+
 2009-12-22  Cary Coutant  <ccoutant@google.com>
 
        PR debug/42454

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 367b00d..e79ef15 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -6073,7 +6073,7 @@
 (define_split
   [(set (match_operand:SF 0 "arm_general_register_operand" "")
        (match_operand:SF 1 "immediate_operand" ""))]
-  "TARGET_32BIT
+  "TARGET_EITHER
    && reload_completed
    && GET_CODE (operands[1]) == CONST_DOUBLE"
   [(set (match_dup 2) (match_dup 3))]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index afb5a9f..b571757 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2009-12-23  Ramana Radhakrishnan  <ramrad01@arm.com>
+
+       PR target/40670
+       * gcc.target/arm/pr40670.c: New test.
+       
 2009-12-23  Uros Bizjak  <ubizjak@gmail.com>
 
        * gcc.target/alpha/20000715-1.c: Remove target selector.

diff --git a/gcc/testsuite/gcc.target/arm/pr40670.c b/gcc/testsuite/gcc.target/arm/pr40670.c
new file mode 100644 (file)
index 0000000..2478638
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr40670.c
@@ -0,0 +1,8 @@
+/* { dg-options "-mthumb -O2" }  */
+/* { dg-require-effective-target arm_thumb1_ok } */
+/* { dg-final { scan-assembler-not "ldr" } } */
+
+float foo (void)
+{
+  return 2.0;
+}