panfrost: Pipe the GPU ID into compiler and disassembler

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>

diff --git a/src/gallium/drivers/panfrost/pan_assemble.c b/src/gallium/drivers/panfrost/pan_assemble.c
index 2d1d1d1..5a36465 100644 (file)
--- a/src/gallium/drivers/panfrost/pan_assemble.c
+++ b/src/gallium/drivers/panfrost/pan_assemble.c
@@ -65,7 +65,7 @@ panfrost_shader_compile(
                 .alpha_ref = state->alpha_state.ref_value
         };
 
-        midgard_compile_shader_nir(&ctx->compiler, s, &program, false);
+        midgard_compile_shader_nir(&ctx->compiler, s, &program, false, screen->gpu_id);
 
         /* Prepare the compiled binary for upload */
         int size = program.compiled.size;

diff --git a/src/gallium/drivers/panfrost/pan_blend_shaders.c b/src/gallium/drivers/panfrost/pan_blend_shaders.c
index 2ee86b4..223925c 100644 (file)
--- a/src/gallium/drivers/panfrost/pan_blend_shaders.c
+++ b/src/gallium/drivers/panfrost/pan_blend_shaders.c
@@ -131,6 +131,7 @@ panfrost_compile_blend_shader(
         struct pipe_blend_state *cso,
         enum pipe_format format)
 {
+        struct panfrost_screen *screen = pan_screen(ctx->base.screen);
         struct panfrost_blend_shader res;
 
         res.ctx = ctx;
@@ -172,7 +173,7 @@ panfrost_compile_blend_shader(
         /* Compile the built shader */
 
         midgard_program program;
-        midgard_compile_shader_nir(&ctx->compiler, shader, &program, true);
+        midgard_compile_shader_nir(&ctx->compiler, shader, &program, true, screen->gpu_id);
 
         /* At least two work registers are needed due to an encoding quirk */
         res.work_count = MAX2(program.work_register_count, 2);

diff --git a/src/gallium/drivers/panfrost/pan_job.c b/src/gallium/drivers/panfrost/pan_job.c
index 8df3480..a0bc999 100644 (file)
--- a/src/gallium/drivers/panfrost/pan_job.c
+++ b/src/gallium/drivers/panfrost/pan_job.c
@@ -881,7 +881,7 @@ panfrost_batch_submit_ioctl(struct panfrost_batch *batch,
                 /* Wait so we can get errors reported back */
                 drmSyncobjWait(screen->fd, &batch->out_sync->syncobj, 1,
                                INT64_MAX, 0, NULL);
-                pandecode_jc(submit.jc, FALSE);
+                pandecode_jc(submit.jc, FALSE, screen->gpu_id);
         }
 
         return 0;

diff --git a/src/panfrost/midgard/compiler.h b/src/panfrost/midgard/compiler.h
index e77344f..498404c 100644 (file)
--- a/src/panfrost/midgard/compiler.h
+++ b/src/panfrost/midgard/compiler.h
@@ -292,6 +292,8 @@ typedef struct compiler_context {
 
         /* Bitmask of valid metadata */
         unsigned metadata;
+
+        unsigned gpu_id;
 } compiler_context;
 
 /* Per-block live_in/live_out */

diff --git a/src/panfrost/midgard/disassemble.c b/src/panfrost/midgard/disassemble.c
index df75730..24c78c3 100644 (file)
--- a/src/panfrost/midgard/disassemble.c
+++ b/src/panfrost/midgard/disassemble.c
@@ -1455,7 +1455,7 @@ print_texture_word(uint32_t *word, unsigned tabs)
 }
 
 struct midgard_disasm_stats
-disassemble_midgard(uint8_t *code, size_t size)
+disassemble_midgard(uint8_t *code, size_t size, unsigned gpu_id)
 {
         uint32_t *words = (uint32_t *) code;
         unsigned num_words = size / 4;

diff --git a/src/panfrost/midgard/disassemble.h b/src/panfrost/midgard/disassemble.h
index fc39875..4d68532 100644 (file)
--- a/src/panfrost/midgard/disassemble.h
+++ b/src/panfrost/midgard/disassemble.h
@@ -23,4 +23,4 @@ struct midgard_disasm_stats {
 };
 
 struct midgard_disasm_stats
-disassemble_midgard(uint8_t *code, size_t size);
+disassemble_midgard(uint8_t *code, size_t size, unsigned gpu_id);

diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c
index 22c0d44..5f369f9 100644 (file)
--- a/src/panfrost/midgard/midgard_compile.c
+++ b/src/panfrost/midgard/midgard_compile.c
@@ -2372,7 +2372,7 @@ midgard_get_first_tag_from_block(compiler_context *ctx, unsigned block_idx)
 }
 
 int
-midgard_compile_shader_nir(struct midgard_screen *screen, nir_shader *nir, midgard_program *program, bool is_blend)
+midgard_compile_shader_nir(struct midgard_screen *screen, nir_shader *nir, midgard_program *program, bool is_blend, unsigned gpu_id)
 {
         struct util_dynarray *compiled = &program->compiled;
 
@@ -2386,6 +2386,7 @@ midgard_compile_shader_nir(struct midgard_screen *screen, nir_shader *nir, midga
         ctx->stage = nir->info.stage;
         ctx->is_blend = is_blend;
         ctx->alpha_ref = program->alpha_ref;
+        ctx->gpu_id = gpu_id;
 
         /* Start off with a safe cutoff, allowing usage of all 16 work
          * registers. Later, we'll promote uniform reads to uniform registers
@@ -2696,7 +2697,7 @@ midgard_compile_shader_nir(struct midgard_screen *screen, nir_shader *nir, midga
         program->tls_size = ctx->tls_size;
 
         if (midgard_debug & MIDGARD_DBG_SHADERS)
-                disassemble_midgard(program->compiled.data, program->compiled.size);
+                disassemble_midgard(program->compiled.data, program->compiled.size, gpu_id);
 
         if (midgard_debug & MIDGARD_DBG_SHADERDB) {
                 unsigned nr_bundles = 0, nr_ins = 0;

diff --git a/src/panfrost/midgard/midgard_compile.h b/src/panfrost/midgard/midgard_compile.h
index bf512a0..2e6e449 100644 (file)
--- a/src/panfrost/midgard/midgard_compile.h
+++ b/src/panfrost/midgard/midgard_compile.h
@@ -111,7 +111,7 @@ typedef struct {
 } midgard_program;
 
 int
-midgard_compile_shader_nir(struct midgard_screen *screen, nir_shader *nir, midgard_program *program, bool is_blend);
+midgard_compile_shader_nir(struct midgard_screen *screen, nir_shader *nir, midgard_program *program, bool is_blend, unsigned gpu_id);
 
 /* NIR options are shared between the standalone compiler and the online
  * compiler. Defining it here is the simplest, though maybe not the Right

diff --git a/src/panfrost/pandecode/decode.c b/src/panfrost/pandecode/decode.c
index ebe1967..0de1f7c 100644 (file)
--- a/src/panfrost/pandecode/decode.c
+++ b/src/panfrost/pandecode/decode.c
@@ -40,8 +40,6 @@
 
 #include "pan_encoder.h"
 
-int pandecode_jc(mali_ptr jc_gpu_va, bool bifrost);
-
 static void pandecode_swizzle(unsigned swizzle, enum mali_format format);
 
 #define MEMORY_PROP(obj, p) {\
@@ -1830,7 +1828,7 @@ static unsigned shader_id = 0;
 
 static struct midgard_disasm_stats
 pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
-                             bool is_bifrost)
+                             bool is_bifrost, unsigned gpu_id)
 {
         struct pandecode_mapped_memory *mem = pandecode_find_mapped_gpu_mem_containing(shader_ptr);
         uint8_t *PANDECODE_PTR_VAR(code, mem, shader_ptr);
@@ -1862,7 +1860,7 @@ pandecode_shader_disassemble(mali_ptr shader_ptr, int shader_no, int type,
                 stats.quadword_count = 0;
                 stats.helper_invocations = false;
         } else {
-                stats = disassemble_midgard(code, sz);
+                stats = disassemble_midgard(code, sz, gpu_id);
         }
 
         /* Print shader-db stats */
@@ -2070,10 +2068,10 @@ pandecode_shader_prop(const char *name, unsigned claim, signed truth, bool fuzzy
 
 static void
 pandecode_blend_shader_disassemble(mali_ptr shader, int job_no, int job_type,
-                                   bool is_bifrost)
+                                   bool is_bifrost, unsigned gpu_id)
 {
         struct midgard_disasm_stats stats =
-                pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost);
+                pandecode_shader_disassemble(shader, job_no, job_type, is_bifrost, gpu_id);
 
         bool has_texture = (stats.texture_count > 0);
         bool has_sampler = (stats.sampler_count > 0);
@@ -2096,7 +2094,7 @@ static void
 pandecode_vertex_tiler_postfix_pre(
                 const struct mali_vertex_tiler_postfix *p,
                 int job_no, enum mali_job_type job_type,
-                char *suffix, bool is_bifrost)
+                char *suffix, bool is_bifrost, unsigned gpu_id)
 {
         struct pandecode_mapped_memory *attr_mem;
 
@@ -2143,7 +2141,7 @@ pandecode_vertex_tiler_postfix_pre(
                 };
 
                 if (s->shader & ~0xF)
-                        info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost);
+                        info = pandecode_shader_disassemble(s->shader & ~0xF, job_no, job_type, is_bifrost, gpu_id);
 
                 pandecode_log("struct mali_shader_meta shader_meta_%"PRIx64"_%d%s = {\n", p->shader, job_no, suffix);
                 pandecode_indent++;
@@ -2272,7 +2270,7 @@ pandecode_vertex_tiler_postfix_pre(
                         union midgard_blend blend = s->blend;
                         mali_ptr shader = pandecode_midgard_blend(&blend, s->unknown2_3 & MALI_HAS_BLEND_SHADER);
                         if (shader & ~0xF)
-                                pandecode_blend_shader_disassemble(shader, job_no, job_type, false);
+                                pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
                 }
 
                 pandecode_indent--;
@@ -2293,7 +2291,7 @@ pandecode_vertex_tiler_postfix_pre(
                                         shader = pandecode_midgard_blend_mrt(blend_base, job_no, i);
 
                                 if (shader & ~0xF)
-                                        pandecode_blend_shader_disassemble(shader, job_no, job_type, false);
+                                        pandecode_blend_shader_disassemble(shader, job_no, job_type, false, gpu_id);
 
                         }
                 }
@@ -2622,11 +2620,11 @@ pandecode_tiler_only_bfr(const struct bifrost_tiler_only *t, int job_no)
 static int
 pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
                                 const struct pandecode_mapped_memory *mem,
-                                mali_ptr payload, int job_no)
+                                mali_ptr payload, int job_no, unsigned gpu_id)
 {
         struct bifrost_payload_vertex *PANDECODE_PTR_VAR(v, mem, payload);
 
-        pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true);
+        pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", true, gpu_id);
 
         pandecode_log("struct bifrost_payload_vertex payload_%d = {\n", job_no);
         pandecode_indent++;
@@ -2648,11 +2646,11 @@ pandecode_vertex_job_bfr(const struct mali_job_descriptor_header *h,
 static int
 pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
                                const struct pandecode_mapped_memory *mem,
-                               mali_ptr payload, int job_no)
+                               mali_ptr payload, int job_no, unsigned gpu_id)
 {
         struct bifrost_payload_tiler *PANDECODE_PTR_VAR(t, mem, payload);
 
-        pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true);
+        pandecode_vertex_tiler_postfix_pre(&t->postfix, job_no, h->job_type, "", true, gpu_id);
         pandecode_tiler_meta(t->tiler.tiler_meta, job_no);
 
         pandecode_log("struct bifrost_payload_tiler payload_%d = {\n", job_no);
@@ -2675,11 +2673,11 @@ pandecode_tiler_job_bfr(const struct mali_job_descriptor_header *h,
 static int
 pandecode_vertex_or_tiler_job_mdg(const struct mali_job_descriptor_header *h,
                 const struct pandecode_mapped_memory *mem,
-                mali_ptr payload, int job_no)
+                mali_ptr payload, int job_no, unsigned gpu_id)
 {
         struct midgard_payload_vertex_tiler *PANDECODE_PTR_VAR(v, mem, payload);
 
-        pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false);
+        pandecode_vertex_tiler_postfix_pre(&v->postfix, job_no, h->job_type, "", false, gpu_id);
 
         pandecode_log("struct midgard_payload_vertex_tiler payload_%d = {\n", job_no);
         pandecode_indent++;
@@ -2815,7 +2813,7 @@ pandecode_fragment_job(const struct pandecode_mapped_memory *mem,
 static int job_descriptor_number = 0;
 
 int
-pandecode_jc(mali_ptr jc_gpu_va, bool bifrost)
+pandecode_jc(mali_ptr jc_gpu_va, bool bifrost, unsigned gpu_id)
 {
         struct mali_job_descriptor_header *h;
 
@@ -2912,11 +2910,11 @@ pandecode_jc(mali_ptr jc_gpu_va, bool bifrost)
                 case JOB_TYPE_COMPUTE:
                         if (bifrost) {
                                 if (h->job_type == JOB_TYPE_TILER)
-                                        pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no);
+                                        pandecode_tiler_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
                                 else
-                                        pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no);
+                                        pandecode_vertex_job_bfr(h, mem, payload_ptr, job_no, gpu_id);
                         } else
-                                pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no);
+                                pandecode_vertex_or_tiler_job_mdg(h, mem, payload_ptr, job_no, gpu_id);
 
                         break;
 

diff --git a/src/panfrost/pandecode/public.h b/src/panfrost/pandecode/public.h
index b52324c..c68dbe6 100644 (file)
--- a/src/panfrost/pandecode/public.h
+++ b/src/panfrost/pandecode/public.h
@@ -47,6 +47,6 @@ void pandecode_initialize(void);
 void
 pandecode_inject_mmap(uint64_t gpu_va, void *cpu, unsigned sz, const char *name);
 
-int pandecode_jc(uint64_t jc_gpu_va, bool bifrost);
+int pandecode_jc(uint64_t jc_gpu_va, bool bifrost, unsigned gpu_id);
 
 #endif /* __MMAP_TRACE_H__ */