- ``x``: A 32, 64, or 128-bit floating-point/SIMD register in the ranges
``s0-s15``, ``d0-d7``, or ``q0-q3``, respectively.
-
Hexagon:
- ``o``, ``v``: A memory address operand, treated the same as constraint ``m``,
at the moment.
- ``r``: A 32 or 64-bit register.
+LoongArch:
+
+- ``f``: A floating-point register (if available).
+- ``k``: A memory operand whose address is formed by a base register and
+ (optionally scaled) index register.
+- ``l``: A signed 16-bit constant.
+- ``m``: A memory operand whose address is formed by a base register and
+ offset that is suitable for use in instructions with the same addressing
+ mode as st.w and ld.w.
+- ``I``: A signed 12-bit constant (for arithmetic instructions).
+- ``J``: An immediate integer zero.
+- ``K``: An unsigned 12-bit constant (for logic instructions).
+- ``ZB``: An address that is held in a general-purpose register. The offset
+ is zero.
+- ``ZC``: A memory operand whose address is formed by a base register and
+ offset that is suitable for use in instructions with the same addressing
+ mode as ll.w and sc.w.
+
MSP430:
- ``r``: An 8 or 16-bit register.
- ``I``: Print the letter 'i' if the operand is an integer constant, otherwise
nothing. Used to print 'addi' vs 'add' instructions.
+LoongArch:
+
+- ``z``: Print $zero register if operand is zero, otherwise print it normally.
+
MSP430:
No additional modifiers.