arm64: dts: qcom: sc7280: Add secondary MI2S pinmux specifications for CRD 3.0/3.1
authorSrinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Mon, 13 Jun 2022 08:24:03 +0000 (13:54 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Sat, 25 Jun 2022 19:47:17 +0000 (14:47 -0500)
Add drive strength property for secondary MI2S on
sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1655108645-1517-3-git-send-email-quic_srivasam@quicinc.com
arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts

diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi
new file mode 100644 (file)
index 0000000..32a1e78
--- /dev/null
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * sc7280 device tree source for boards using Max98360 and wcd9385 codec
+ *
+ * Copyright (c) 2022, The Linux Foundation. All rights reserved.
+ */
+
+&mi2s1_data0 {
+       drive-strength = <6>;
+       bias-disable;
+};
+
+&mi2s1_sclk {
+       drive-strength = <6>;
+       bias-disable;
+};
+
+&mi2s1_ws {
+       drive-strength = <6>;
+};
index a4ac33c..53feaed 100644 (file)
@@ -8,6 +8,7 @@
 /dts-v1/;
 
 #include "sc7280-herobrine.dtsi"
+#include "sc7280-herobrine-audio-wcd9385.dtsi"
 
 / {
        model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";