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clk: analogbits: fix doc warning in wrpll-cln28hpc.c
author
Yang Yingliang
<yangyingliang@huawei.com>
Tue, 1 Jun 2021 11:41:54 +0000
(19:41 +0800)
committer
Stephen Boyd
<sboyd@kernel.org>
Wed, 2 Jun 2021 06:39:42 +0000
(23:39 -0700)
Fix the following make W=1 warning:
drivers/clk/analogbits/wrpll-cln28hpc.c:227: warning: expecting prototype for wrpll_configure(). Prototype was for wrpll_configure_for_rate() instead
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link:
https://lore.kernel.org/r/20210601114154.3163327-1-yangyingliang@huawei.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/analogbits/wrpll-cln28hpc.c
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diff --git
a/drivers/clk/analogbits/wrpll-cln28hpc.c
b/drivers/clk/analogbits/wrpll-cln28hpc.c
index
776ead3
..
3b19475
100644
(file)
--- a/
drivers/clk/analogbits/wrpll-cln28hpc.c
+++ b/
drivers/clk/analogbits/wrpll-cln28hpc.c
@@
-198,7
+198,7
@@
static int __wrpll_update_parent_rate(struct wrpll_cfg *c,
}
/**
- * wrpll_configure() - compute PLL configuration for a target rate
+ * wrpll_configure
_for_rate
() - compute PLL configuration for a target rate
* @c: ptr to a struct wrpll_cfg record to write into
* @target_rate: target PLL output clock rate (post-Q-divider)
* @parent_rate: PLL input refclk rate (pre-R-divider)