The mt8186 contains 8 GPIO physical address bases that correspond to
the 'reg-names' of the pinctrl driver. The 'reg-names' entries in
bindings are ordered incorrectly, though. The system crashes due of an
erroneous address when the regulator initializes.
We fix the 'reg-names' for the pinctrl nodes and the pinctrl-mt8186
example in bindings.
Fixes:
338e953f1bd1 ("dt-bindings: pinctrl: mt8186: add pinctrl file and binding document")
Co-developed-by: Guodong Liu <guodong.liu@mediatek.com>
Signed-off-by: Guodong Liu <guodong.liu@mediatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: NĂcolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220819120649.21523-1-allen-kh.cheng@mediatek.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Gpio base register names.
items:
- const: iocfg0
- - const: iocfg_bm
- - const: iocfg_bl
- - const: iocfg_br
+ - const: iocfg_lt
- const: iocfg_lm
+ - const: iocfg_lb
+ - const: iocfg_bl
- const: iocfg_rb
- - const: iocfg_tl
+ - const: iocfg_rt
- const: eint
interrupt-controller: true
<0x10002A00 0x0200>,
<0x10002c00 0x0200>,
<0x1000b000 0x1000>;
- reg-names = "iocfg0", "iocfg_bm", "iocfg_bl",
- "iocfg_br", "iocfg_lm", "iocfg_rb",
- "iocfg_tl", "eint";
+ reg-names = "iocfg0", "iocfg_lt", "iocfg_lm",
+ "iocfg_lb", "iocfg_bl", "iocfg_rb",
+ "iocfg_rt", "eint";
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pio 0 0 185>;