Revert "[AArch64][SME]: Add precursory tests for D138791"

This reverts commit 45adca0f52af346a131163d1cc3e4a08baf7f0f1.

diff --git a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll b/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll
deleted file mode 100644 (file)
index 8edab93..0000000
--- a/llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-ld2-alloca.ll
+++ /dev/null
@@ -1,111 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -force-streaming-compatible-sve < %s | FileCheck %s
-
-target triple = "aarch64-unknown-linux-gnu"
-
-declare void @def(ptr)
-
-define void @alloc_v4i8(ptr %st_ptr) #0 {
-; CHECK-LABEL: alloc_v4i8:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #32
-; CHECK-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
-; CHECK-NEXT:    mov x19, x0
-; CHECK-NEXT:    add x0, sp, #12
-; CHECK-NEXT:    bl def
-; CHECK-NEXT:    ldr s0, [sp, #12]
-; CHECK-NEXT:    ptrue p0.h, vl4
-; CHECK-NEXT:    uunpklo z0.h, z0.b
-; CHECK-NEXT:    fmov w8, s0
-; CHECK-NEXT:    mov z1.h, z0.h[3]
-; CHECK-NEXT:    mov z2.h, z0.h[1]
-; CHECK-NEXT:    mov z0.h, z0.h[2]
-; CHECK-NEXT:    fmov w9, s1
-; CHECK-NEXT:    fmov w10, s2
-; CHECK-NEXT:    strh w8, [sp]
-; CHECK-NEXT:    fmov w8, s0
-; CHECK-NEXT:    strh w9, [sp, #6]
-; CHECK-NEXT:    strh w10, [sp, #4]
-; CHECK-NEXT:    strh w8, [sp, #2]
-; CHECK-NEXT:    ldr d0, [sp]
-; CHECK-NEXT:    st1b { z0.h }, p0, [x19]
-; CHECK-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT:    add sp, sp, #32
-; CHECK-NEXT:    ret
-  %alloc = alloca [4 x i8]
-  call void @def(ptr %alloc)
-  %load = load <4 x i8>, ptr %alloc
-  %strided.vec = shufflevector <4 x i8> %load, <4 x i8> poison, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
-  store <4 x i8> %strided.vec, ptr %st_ptr
-  ret void
-}
-
-define void @alloc_v6i8(ptr %st_ptr) #0 {
-; CHECK-LABEL: alloc_v6i8:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #32
-; CHECK-NEXT:    stp x30, x19, [sp, #16] // 16-byte Folded Spill
-; CHECK-NEXT:    mov x19, x0
-; CHECK-NEXT:    add x0, sp, #8
-; CHECK-NEXT:    bl def
-; CHECK-NEXT:    ldr d0, [sp, #8]
-; CHECK-NEXT:    mov z1.b, z0.b[4]
-; CHECK-NEXT:    mov z2.b, z0.b[5]
-; CHECK-NEXT:    fmov w8, s0
-; CHECK-NEXT:    fmov w9, s1
-; CHECK-NEXT:    fmov w10, s2
-; CHECK-NEXT:    mov z3.b, z0.b[3]
-; CHECK-NEXT:    mov z4.b, z0.b[1]
-; CHECK-NEXT:    mov z0.b, z0.b[2]
-; CHECK-NEXT:    strb w8, [sp]
-; CHECK-NEXT:    fmov w8, s3
-; CHECK-NEXT:    strb w9, [sp, #5]
-; CHECK-NEXT:    fmov w9, s4
-; CHECK-NEXT:    strb w10, [sp, #4]
-; CHECK-NEXT:    fmov w10, s0
-; CHECK-NEXT:    strb w8, [sp, #3]
-; CHECK-NEXT:    strb w9, [sp, #2]
-; CHECK-NEXT:    strb w10, [sp, #1]
-; CHECK-NEXT:    ldr d0, [sp]
-; CHECK-NEXT:    mov z1.h, z0.h[2]
-; CHECK-NEXT:    fmov w8, s0
-; CHECK-NEXT:    fmov w9, s1
-; CHECK-NEXT:    str w8, [x19]
-; CHECK-NEXT:    strh w9, [x19, #4]
-; CHECK-NEXT:    ldp x30, x19, [sp, #16] // 16-byte Folded Reload
-; CHECK-NEXT:    add sp, sp, #32
-; CHECK-NEXT:    ret
-  %alloc = alloca [6 x i8]
-  call void @def(ptr %alloc)
-  %load = load <6 x i8>, ptr %alloc
-  %strided.vec = shufflevector <6 x i8> %load, <6 x i8> poison, <6 x i32> <i32 0, i32 2, i32 1, i32 3, i32 5, i32 4>
-  store <6 x i8> %strided.vec, ptr %st_ptr
-  ret void
-}
-
-define void @alloc_v8f64(ptr %st_ptr) #0 {
-; CHECK-LABEL: alloc_v8f64:
-; CHECK:       // %bb.0:
-; CHECK-NEXT:    sub sp, sp, #96
-; CHECK-NEXT:    stp x20, x19, [sp, #80] // 16-byte Folded Spill
-; CHECK-NEXT:    mov x19, x0
-; CHECK-NEXT:    mov x0, sp
-; CHECK-NEXT:    str x30, [sp, #64] // 8-byte Folded Spill
-; CHECK-NEXT:    mov x20, sp
-; CHECK-NEXT:    bl def
-; CHECK-NEXT:    ld2 { v0.2d, v1.2d }, [x20], #32
-; CHECK-NEXT:    ldr x30, [sp, #64] // 8-byte Folded Reload
-; CHECK-NEXT:    ld2 { v2.2d, v3.2d }, [x20]
-; CHECK-NEXT:    stp q0, q2, [x19]
-; CHECK-NEXT:    ldp x20, x19, [sp, #80] // 16-byte Folded Reload
-; CHECK-NEXT:    add sp, sp, #96
-; CHECK-NEXT:    ret
-  %alloc = alloca [8 x double]
-  call void @def(ptr %alloc)
-  %load = load <8 x double>, ptr %alloc
-  %strided.vec = shufflevector <8 x double> %load, <8 x double> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
-  store <4 x double> %strided.vec, ptr %st_ptr
-  ret void
-}
-
-attributes #0 = { "target-features"="+sve" nounwind}