dts: Add new dts files for T962E2 SBR [1/1]
authorbing.jiang <bing.jiang@amlogic.com>
Fri, 18 Oct 2019 08:56:42 +0000 (16:56 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Fri, 25 Oct 2019 08:37:09 +0000 (01:37 -0700)
PD#SWPL-15141

Problem:
    adapt Soundbar solution to T962E2 SBR platform

Solution:
    new dts file tm2_t962e2_ab311_sbr.dts changed from tm2_t962e2_ab311.dts
    tm2_t962e2_ab311.dts file version
        'commit 952ac4c1d709 ("hdmirx: pinmux later so as to
                               prevent abnormal hpd pulse [1/1]")'

    add amp tas5782m
    add amlogic-remote-4

Verify:
    T962E2

Change-Id: I5b4ad1bc526167970de2a85aadc4089ef5eeb233
Signed-off-by: bing.jiang <bing.jiang@amlogic.com>
MAINTAINERS
arch/arm/boot/dts/amlogic/mesontm2.dtsi
arch/arm/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/mesontm2.dtsi
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts [new file with mode: 0644]

index db338ff..ae9f4f9 100644 (file)
@@ -15175,3 +15175,8 @@ AMLOGIC VAD WAKEUP POWER
 M: Zhiqiang Liang <zhiqiang.liang@amlogic.com>
 F: drivers/amlogic/pm/vad_power.c
 F: drivers/amlogic/pm/vad_power.h
+
+AMLOGIC T962E2 SBR DTS
+M:  Bing Jiang <Bing.Jiang@amlogic.com>
+F:  arch/arm/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts
+F:  arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts
index 6328b41..f638c74 100644 (file)
        }; /* end of soc*/
 
        custom_maps: custom_maps {
-               mapnum = <3>;
+               mapnum = <4>;
                map0 = <&map_0>;
                map1 = <&map_1>;
                map2 = <&map_2>;
+               map3 = <&map_3>;
                map_0: map_0{
                        mapname = "amlogic-remote-1";
                        customcode = <0xfb04>;
                                REMOTE_KEY(0x9a,KEY_SCALE)
                                REMOTE_KEY(0xcd,KEY_KPCOMMA)>;
                };
+               map_3: map_3{
+                       mapname = "amlogic-remote-4";
+                       customcode = <0xa4e8>; /* Reference Remote Control */
+                       release_delay = <80>;
+                       size  = <45>;
+                       keymap = <
+                               REMOTE_KEY(0xc7, 200) /* power */
+                               REMOTE_KEY(0x93, 201) /* eject-->input source */
+                               REMOTE_KEY(0xb2, 202) /* usb */
+                               REMOTE_KEY(0xb8, 203) /* coaxial */
+                               REMOTE_KEY(0xb7, 204) /* aux */
+                               REMOTE_KEY(0x8a, 205) /* scan-->hdmi arc */
+                               REMOTE_KEY(0x96, 206) /* dimmer */
+                               REMOTE_KEY(0x90, 207) /* hdmi1 */
+                               REMOTE_KEY(0xa8, 208) /* hdmi2 */
+                               REMOTE_KEY(0x85, 209) /* mute */
+                               REMOTE_KEY(0x80, 210) /* vol+ */
+                               REMOTE_KEY(0x81, 211) /* vol- */
+                               REMOTE_KEY(0x61, 212) /* DAP */
+                               REMOTE_KEY(0x62, 213) /* BM */
+                               REMOTE_KEY(0x63, 214) /* DRC */
+                               REMOTE_KEY(0x64, 215) /* POST */
+                               REMOTE_KEY(0x65, 216) /* UPMIX */
+                               REMOTE_KEY(0x66, 217) /* VIRT */
+                               REMOTE_KEY(0x67, 218) /* LEGACY */
+                               REMOTE_KEY(0x68, 219) /* HFILT */
+                               REMOTE_KEY(0x69, 220) /* Loundness */
+                               REMOTE_KEY(0x60, 221) /* Audio_info */
+                               REMOTE_KEY(0xb1, 222) /* CD */
+                               REMOTE_KEY(0xb4, 223) /* CD */
+                               REMOTE_KEY(0xb9, 224) /* CD */
+                               REMOTE_KEY(0xab, 225) /* CD */
+                               REMOTE_KEY(0x91, 226) /* CD */
+                               REMOTE_KEY(0x92, 227) /* CD */
+                               REMOTE_KEY(0x89, 228) /* CD */
+                               REMOTE_KEY(0x88, 229) /* CD */
+                               REMOTE_KEY(0xa5, 230) /* CD */
+                               REMOTE_KEY(0x84, 231) /* CD */
+                               REMOTE_KEY(0x72, 232) /* CD */
+                               REMOTE_KEY(0x73, 233) /* CD */
+                               REMOTE_KEY(0x9a, 234) /* CD */
+                               REMOTE_KEY(0x9b, 235) /* CD */
+                               REMOTE_KEY(0xa0, 236) /* CD */
+                               REMOTE_KEY(0x71, 237) /* CD */
+                               REMOTE_KEY(0x74, 238) /* CD */
+                               REMOTE_KEY(0x75, 239) /* CD */
+                               REMOTE_KEY(0x7e, 240) /* CD */
+                               REMOTE_KEY(0x7f, 241) /* CD */
+                               REMOTE_KEY(0x7a, 242) /* CD */
+                               REMOTE_KEY(0xa7, 243) /* CD */
+                               REMOTE_KEY(0xa9, 244) /* CD */
+                               >;
+               };
        };
 
        uart_A: serial@ffd24000 {
diff --git a/arch/arm/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts b/arch/arm/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts
new file mode 100644 (file)
index 0000000..8f8354f
--- /dev/null
@@ -0,0 +1,2199 @@
+/*
+ * arch/arm/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesontm2.dtsi"
+#include "partition_mbox_normal.dtsi"
+
+/ {
+       model = "Amlogic TM2 T962E2 AB311";
+       amlogic-dt-id = "tm2_t962e2_ab311";
+       compatible = "amlogic, tm2_t962e2_ab311";
+
+       aliases {
+               serial0 = &uart_AO;
+               serial1 = &uart_A;
+               serial2 = &uart_B;
+               serial3 = &uart_C;
+               serial4 = &uart_AO_B;
+               tsensor0 = &p_tsensor;
+               tsensor1 = &d_tsensor;
+               tsensor2 = &s_tsensor;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c_AO;
+               spi0 = &spicc0;
+               spi1 = &spicc1;
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               linux,usable-memory = <0x0 0x80000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               /* global autoconfigured region for contiguous allocations */
+               ramoops@0x07400000 {
+                       compatible = "ramoops";
+                       reg = <0x07400000 0x00100000>;
+                       record-size = <0x8000>;
+                       console-size = <0x8000>;
+                       ftrace-size = <0x40000>;
+               };
+
+               secmon_reserved: linux,secmon {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x400000>;
+                       alignment = <0x400000>;
+                       alloc-ranges = <0x05000000 0x400000>;
+               };
+
+               logo_reserved:linux,meson-fb {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x800000>;
+                       alignment = <0x400000>;
+                       alloc-ranges = <0x7f800000 0x800000>;
+               };
+
+               lcd_tcon_reserved:linux,lcd_tcon {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0xc00000>;
+                       alignment = <0x400000>;
+                       alloc-ranges = <0x7ec00000 0xc00000>;
+               };
+
+               codec_mm_cma:linux,codec_mm_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* ion_codec_mm max can alloc size 80M*/
+                       size = <0x13400000>;
+                       alignment = <0x400000>;
+                       linux,contiguous-region;
+                       alloc-ranges = <0x30000000 0x50000000>;
+               };
+
+               /* codec shared reserved */
+               codec_mm_reserved:linux,codec_mm_reserved {
+                       compatible = "amlogic, codec-mm-reserved";
+                       size = <0x0>;
+                       alignment = <0x100000>;
+                       //no-map;
+               };
+
+               ion_cma_reserved:linux,ion-dev {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x2000000>;
+                       alignment = <0x400000>;
+               };
+
+               /*  vdin0 CMA pool */
+               //vdin0_cma_reserved:linux,vdin0_cma {
+               //      compatible = "shared-dma-pool";
+               //      reusable;
+                       /* 3840x2160x4x4 ~=128 M */
+               //      size = <0xc400000>;
+               //      alignment = <0x400000>;
+               //};
+
+               /*  vdin1 CMA pool */
+               vdin1_cma_reserved:linux,vdin1_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* 1920x1080x2x4  =16 M */
+                       size = <0x1400000>;
+                       alignment = <0x400000>;
+               };
+
+               /*demod_reserved:linux,demod {
+                *      compatible = "amlogic, demod-mem";
+                *      size = <0x800000>; //8M //100m 0x6400000
+                *      alloc-ranges = <0x0 0x30000000>;
+                *      //multi-use;
+                *      //no-map;
+                *};
+                */
+
+               demod_cma_reserved:linux,demod_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* 8M */
+                       size = <0x0800000>;
+                       alignment = <0x400000>;
+               };
+
+               /*di CMA pool */
+               di_cma_reserved:linux,di_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* buffer_size = 3621952(yuv422 8bit)
+                        *  | 4736064(yuv422 10bit)
+                        *  | 4074560(yuv422 10bit full pack mode)
+                        * 10x3621952=34.6M(0x23) support 8bit
+                        * 10x4736064=45.2M(0x2e) support 12bit
+                        * 10x4074560=40M(0x28) support 10bit
+                        */
+                       size = <0x02800000>;
+                       alignment = <0x400000>;
+               };
+
+               /* for hdmi rx emp use */
+               hdmirx_emp_cma_reserved:linux,emp_cma {
+                       compatible = "shared-dma-pool";
+                       /*linux,phandle = <5>;*/
+                       reusable;
+                       /* 4M for emp to ddr */
+                       /* 32M for tmds to ddr */
+                       size = <0x400000>;
+                       alignment = <0x400000>;
+                       /* alloc-ranges = <0x400000 0x2000000>; */
+               };
+
+               /* POST PROCESS MANAGER */
+               ppmgr_reserved:linux,ppmgr {
+                       compatible = "amlogic, ppmgr_memory";
+                       size = <0x0>;
+               };
+
+               picdec_cma_reserved:linux,picdec {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0>;
+                       alignment = <0x0>;
+                       linux,contiguous-region;
+               };
+
+               dsp_fw_reserved:linux,dsp_fw {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x01000000>;
+                       alignment = <0x00400000>;
+                       alloc-ranges = <0x30000000 0x01000000>;
+               };
+       }; /* end of reserved-memory */
+       galcore {
+               status = "okay";
+       };
+       codec_mm {
+               compatible = "amlogic, codec, mm";
+               status = "okay";
+               memory-region = <&codec_mm_cma &codec_mm_reserved>;
+       };
+
+       picdec {
+               compatible = "amlogic, picdec";
+               memory-region = <&picdec_cma_reserved>;
+               dev_name = "picdec";
+               status = "okay";
+       };
+
+       ppmgr {
+               compatible = "amlogic, ppmgr";
+               memory-region = <&ppmgr_reserved>;
+               status = "okay";
+       };
+
+       deinterlace {
+               compatible = "amlogic, deinterlace";
+               status = "okay";
+               /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+               flag_cma = <1>;
+               //memory-region = <&di_reserved>;
+               memory-region = <&di_cma_reserved>;
+               interrupts = <0 46 1
+                               0 40 1>;
+               interrupt-names = "pre_irq", "post_irq";
+               clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+                       <&clkc CLKID_VPU_CLKB_COMP>;
+               clock-names = "vpu_clkb_tmp_composite",
+                       "vpu_clkb_composite";
+               clock-range = <334 667>;
+               /* buffer-size = <3621952>;(yuv422 8bit) */
+               buffer-size = <4074560>;/*yuv422 fullpack*/
+               /* reserve-iomap = "true"; */
+               /* if enable nr10bit, set nr10bit-support to 1 */
+               post-wr-support = <1>;
+               nr10bit-support = <1>;
+               nrds-enable = <1>;
+               pps-enable = <1>;
+       };
+
+       vout {
+               compatible = "amlogic, vout";
+               status = "okay";
+               fr_auto_policy = <0>;
+       };
+
+       /* Audio Related start */
+       pdm_codec:dummy {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, pdm_dummy_codec";
+               status = "okay";
+       };
+
+       dummy_codec:dummy {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml_dummy_codec";
+               status = "okay";
+       };
+
+       tl1_codec:codec {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, tl1_acodec";
+               status = "okay";
+               reg = <0xff632000 0x1c>;
+               tdmout_index = <0>;
+               tdmin_index = <0>;
+               dat1_ch_sel = <1>;
+       };
+
+       aml_dtv_demod {
+               compatible = "amlogic, ddemod-tm2";
+               dev_name = "aml_dtv_demod";
+               status = "okay";
+
+               //pinctrl-names="dtvdemod_agc";
+               //pinctrl-0=<&dtvdemod_agc>;
+
+               clocks = <&clkc CLKID_DAC_CLK>;
+               clock-names = "vdac_clk_gate";
+
+               reg = <0xff650000 0x4000        /*dtv demod base*/
+                          0xff63c000 0x2000    /*hiu reg base*/
+                          0xff800000 0x1000    /*io_aobus_base*/
+                          0xffd01000 0x1000    /*reset*/
+                       >;
+
+               dtv_demod0_mem = <0>;   // need move to aml_dtv_demod ?
+               spectrum = <1>;
+               cma_flag = <1>;
+               cma_mem_size = <8>;
+               memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+       };
+
+       auge_sound {
+               compatible = "amlogic, tm2-sound-card";
+               aml-audio-card,name = "AML-AUGESOUND";
+
+               avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>;
+
+               aml-audio-card,dai-link@0 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       //bitclock-master = <&tdma>;
+                       //frame-master = <&tdma>;
+                       /* slave mode */
+                       /*
+                        * bitclock-master = <&tdmacodec>;
+                        * frame-master = <&tdmacodec>;
+                        */
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-i2s";
+                       tdmacpu: cpu {
+                               sound-dai = <&tdma>;
+                               dai-tdm-slot-tx-mask =
+                                                       <1 1>;
+                               dai-tdm-slot-rx-mask =
+                                                       <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmacodec: codec {
+                               //sound-dai = <&dummy_codec>;
+                               //prefix-names = "AMP", "AMP1";
+                               //sound-dai = <&ad82584f &ad82584f1 &tl1_codec>;
+                               prefix-names = "AMP", "AMP1", "tas5782m_pu1",
+                               "tas5782m_pu2", "tas5782m_pu3", "tas5782m_pu4";
+                               sound-dai = <&ad82584f &ad82584f1 &tas5782m_pu1
+                               &tas5782m_pu2 &tas5782m_pu3 &tas5782m_pu4>;
+                       };
+               };
+
+               aml-audio-card,dai-link@1 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdmb>;
+                       frame-master = <&tdmb>;
+                       /* slave mode */
+                       //bitclock-master = <&tdmbcodec>;
+                       //frame-master = <&tdmbcodec>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-pcm";
+                       cpu {
+                               sound-dai = <&tdmb>;
+                               dai-tdm-slot-tx-mask = <1 1>;
+                               dai-tdm-slot-rx-mask = <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               /*
+                                * dai-tdm-slot-tx-mask =
+                                *      <1 1 1 1 1 1 1 1>;
+                                * dai-tdm-slot-rx-mask =
+                                *      <1 1 1 1 1 1 1 1>;
+                                * dai-tdm-slot-num = <8>;
+                                */
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmbcodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@2 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdmc>;
+                       frame-master = <&tdmc>;
+                       /* slave mode */
+                       //bitclock-master = <&tdmccodec>;
+                       //frame-master = <&tdmccodec>;
+                       /* suffix-name, sync with android audio hal used for */
+                       //suffix-name = "alsaPORT-tdm";
+                       cpu {
+                               sound-dai = <&tdmc>;
+                               dai-tdm-slot-tx-mask = <1 1>;
+                               dai-tdm-slot-rx-mask = <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmccodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@3 {
+                       mclk-fs = <64>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-pdm";
+                       cpu {
+                               sound-dai = <&pdm>;
+                       };
+                       codec {
+                               sound-dai = <&pdm_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@4 {
+                       mclk-fs = <128>;
+                       continuous-clock;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-spdif";
+                       cpu {
+                               sound-dai = <&spdifa>;
+                               system-clock-frequency = <6144000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@5 {
+                       mclk-fs = <128>;
+                       suffix-name = "alsaPORT-spdifb";
+                       cpu {
+                               sound-dai = <&spdifb>;
+                               system-clock-frequency = <6144000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@6 {
+                       mclk-fs = <256>;
+                       suffix-name = "alsaPORT-tv";
+                       cpu {
+                               sound-dai = <&extn>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@7 {
+                       mclk-fs = <256>;
+                       suffix-name = "alsaPORT-earc";
+                       cpu {
+                               sound-dai = <&earc>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@8 {
+                       mclk-fs = <256>;
+                       continuous-clock;
+                       suffix-name = "alsaPORT-loopback";
+                       cpu {
+                               sound-dai = <&loopbacka>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+       };
+       /* Audio Related end */
+
+       dvb {
+               compatible = "amlogic, dvb";
+               status = "okay";
+               fe0_mode = "internal";
+               fe0_tuner = <&tuner>;
+
+               /*"parallel","serial","disable"*/
+               ts2 = "parallel";
+               ts2_control = <0>;
+               ts2_invert = <0>;
+               interrupts = <0 23 1
+                               0 5 1
+                               0 53 1
+                               0 19 1
+                               0 25 1
+                               0 17 1>;
+               interrupt-names = "demux0_irq",
+                               "demux1_irq",
+                               "demux2_irq",
+                               "dvr0_irq",
+                               "dvr1_irq",
+                               "dvr2_irq";
+               clocks = <&clkc CLKID_DEMUX
+                       &clkc CLKID_ASYNC_FIFO
+                       &clkc CLKID_AHB_ARB0
+/*             &clkc CLKID_DOS_PARSER>;*/
+               &clkc CLKID_U_PARSER>;
+               clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+       };
+
+       tvafe_avin_detect {
+               compatible = "amlogic, tm2_tvafe_avin_detect";
+               status = "okay";
+               device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+               interrupts = <0 12 1>,
+                               <0 13 1>;
+       };
+
+       amlvecm {
+               compatible = "amlogic, vecm-tm2";
+               dev_name = "aml_vecm";
+               status = "okay";
+               gamma_en = <1>;/*1:enabel ;0:disable*/
+               wb_en = <1>;/*1:enabel ;0:disable*/
+               cm_en = <0>;/*1:enabel ;0:disable*/
+               wb_sel = <0>;/*1:mtx ;0:gainoff*/
+               vlock_en = <1>;/*1:enable;0:disable*/
+               vlock_mode = <0x4>;
+               /* vlock work mode:
+                *bit0:auto ENC
+                *bit1:auto PLL
+                *bit2:manual PLL
+                *bit3:manual ENC
+                *bit4:manual soft ENC
+                *bit5:manual MIX PLL ENC
+                */
+                vlock_pll_m_limit = <1>;
+                vlock_line_limit = <3>;
+       };
+
+       amdolby_vision {
+               compatible = "amlogic, dolby_vision_tm2";
+               dev_name = "aml_amdolby_vision_driver";
+               status = "okay";
+               tv_mode = <0>;/*1:enabel ;0:disable*/
+       };
+
+       vdin@0 {
+               compatible = "amlogic, vdin";
+               /*memory-region = <&vdin0_cma_reserved>;*/
+               status = "okay";
+               /*bit0:(1:share with codec_mm;0:cma alone)
+                *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+                */
+               flag_cma = <0x101>;
+               /*MByte, if 10bit disable: 64M(YUV422),
+                *if 10bit enable: 64*1.5 = 96M(YUV422)
+                *if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 200M
+                *if support 4K2K-YUV422-10bit-wr:3840*2160*3*6 ~= 160M
+                *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+                *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+                */
+               cma_size = <200>;
+               interrupts = <0 83 1>;
+               rdma-irq = <2>;
+               clocks = <&clkc CLKID_FCLK_DIV5>,
+                       <&clkc CLKID_VDIN_MEAS_COMP>;
+               clock-names = "fclk_div5", "cts_vdin_meas_clk";
+               vdin_id = <0>;
+               /*vdin write mem color depth support:
+                * bit0:support 8bit
+                * bit1:support 9bit
+                * bit2:support 10bit
+                * bit3:support 12bit
+                * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
+                */
+               tv_bit_mode = <0x215>;
+               /* afbce_bit_mode: (amlogic frame buff compression encoder)
+                * bit0 -- enable afbce
+                * bit1 -- enable afbce compression-lossy
+                * bit4 -- afbce for 4k
+                * bit5 -- afbce for 1080p
+                * bit6 -- afbce for 720p
+                * bit7 -- afbce for smaller resolution
+                */
+               afbce_bit_mode = <0x0>;
+       };
+
+       vdin@1 {
+               compatible = "amlogic, vdin";
+               memory-region = <&vdin1_cma_reserved>;
+               status = "okay";
+               /*bit0:(1:share with codec_mm;0:cma alone)
+                *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+                */
+               flag_cma = <0>;
+               interrupts = <0 85 1>;
+               rdma-irq = <4>;
+               clocks = <&clkc CLKID_FCLK_DIV5>,
+                       <&clkc CLKID_VDIN_MEAS_COMP>;
+               clock-names = "fclk_div5", "cts_vdin_meas_clk";
+               vdin_id = <1>;
+               /*vdin write mem color depth support:
+                *bit0:support 8bit
+                *bit1:support 9bit
+                *bit2:support 10bit
+                *bit3:support 12bit
+                */
+               tv_bit_mode = <0x15>;
+       };
+
+       tvafe {
+               compatible = "amlogic, tvafe-tm2";
+               /*memory-region = <&tvafe_cma_reserved>;*/
+               status = "okay";
+               flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+               cma_size = <5>;/*MByte*/
+               reg = <0xff654000 0x2000>;/*tvafe reg base*/
+               reserve-iomap = "true";
+               tvafe_id = <0>;
+               //pinctrl-names = "default";
+               /*!!particular sequence, no more and no less!!!*/
+               tvafe_pin_mux = <
+                               3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+                               1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+                               2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+                               4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+               >;
+               clocks = <&clkc CLKID_DAC_CLK>;
+               clock-names = "vdac_clk_gate";
+
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
+       };
+
+       vbi {
+               compatible = "amlogic, vbi";
+               status = "okay";
+               interrupts = <0 83 1>;
+       };
+
+       cvbsout {
+               compatible = "amlogic, cvbsout-tm2";
+               status = "disabled";
+               clocks = <&clkc CLKID_VCLK2_ENCI
+                       &clkc CLKID_VCLK2_VENCI0
+                       &clkc CLKID_VCLK2_VENCI1
+                       &clkc CLKID_DAC_CLK>;
+               clock-names = "venci_top_gate",
+                       "venci_0_gate",
+                       "venci_1_gate",
+                       "vdac_clk_gate";
+               /* clk path */
+               /* 0:vid_pll vid2_clk */
+               /* 1:gp0_pll vid2_clk */
+               /* 2:vid_pll vid1_clk */
+               /* 3:gp0_pll vid1_clk */
+               clk_path = <0>;
+
+               /* performance: reg_address, reg_value */
+               /* tm2 */
+               performance = <0x1bf0  0x9
+                       0x1b56  0x333
+                       0x1b12  0x8080
+                       0x1b05  0xfd
+                       0x1c59  0xf850
+                       0xffff  0x0>; /* ending flag */
+               performance_sarft = <0x1bf0  0x9
+                       0x1b56  0x333
+                       0x1b12  0x0
+                       0x1b05  0x9
+                       0x1c59  0xfc48
+                       0xffff  0x0>; /* ending flag */
+               performance_revB_telecom = <0x1bf0  0x9
+                       0x1b56  0x546
+                       0x1b12  0x8080
+                       0x1b05  0x9
+                       0x1c59  0xf850
+                       0xffff  0x0>; /* ending flag */
+       };
+
+       /* for external keypad */
+       adc_keypad {
+               compatible = "amlogic, adc_keypad";
+               status = "okay";
+               key_name = "power","up","down","enter","left","right","home";
+               key_num = <7>;
+               io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>;
+               io-channel-names = "key-chan-2", "key-chan-3";
+               key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+                       SARADC_CH2 SARADC_CH3 SARADC_CH3>;
+               key_code = <116 103 108 28 105 106 102>;
+               key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
+               key_tolerance = <40 40 40 40 40 40 40>;
+};
+
+       unifykey {
+               compatible = "amlogic, unifykey";
+               status = "okay";
+
+               unifykey-num = <24>;
+               unifykey-index-0 = <&keysn_0>;
+               unifykey-index-1 = <&keysn_1>;
+               unifykey-index-2 = <&keysn_2>;
+               unifykey-index-3 = <&keysn_3>;
+               unifykey-index-4 = <&keysn_4>;
+               unifykey-index-5 = <&keysn_5>;
+               unifykey-index-6 = <&keysn_6>;
+               unifykey-index-7 = <&keysn_7>;
+               unifykey-index-8 = <&keysn_8>;
+               unifykey-index-9 = <&keysn_9>;
+               unifykey-index-10= <&keysn_10>;
+               unifykey-index-11 = <&keysn_11>;
+               unifykey-index-12 = <&keysn_12>;
+               unifykey-index-13 = <&keysn_13>;
+               unifykey-index-14 = <&keysn_14>;
+               unifykey-index-15 = <&keysn_15>;
+               unifykey-index-16 = <&keysn_16>;
+               unifykey-index-17 = <&keysn_17>;
+               unifykey-index-18 = <&keysn_18>;
+               unifykey-index-19 = <&keysn_19>;
+               unifykey-index-20 = <&keysn_20>;
+               unifykey-index-21 = <&keysn_21>;
+               unifykey-index-22 = <&keysn_22>;
+               unifykey-index-23 = <&keysn_23>;
+
+               keysn_0: key_0{
+                       key-name = "usid";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_1:key_1{
+                       key-name = "mac";
+                       key-device  = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_2:key_2{
+                       key-name = "hdcp";
+                       key-device = "secure";
+                       key-type  = "sha1";
+                       key-permit = "read","write","del";
+               };
+               keysn_3:key_3{
+                       key-name = "secure_boot_set";
+                       key-device = "efuse";
+                       key-permit = "write";
+               };
+               keysn_4:key_4{
+                       key-name = "mac_bt";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+                       key-type  = "mac";
+               };
+               keysn_5:key_5{
+                       key-name = "mac_wifi";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+                       key-type  = "mac";
+               };
+               keysn_6:key_6{
+                       key-name = "hdcp2_tx";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_7:key_7{
+                       key-name = "hdcp2_rx";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_8:key_8{
+                       key-name = "widevinekeybox";
+                       key-device = "secure";
+                       key-type = "sha1";
+                       key-permit = "read","write","del";
+               };
+               keysn_9:key_9{
+                       key-name = "deviceid";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_10:key_10{
+                       key-name = "hdcp22_fw_private";
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_11:key_11{
+                       key-name = "hdcp22_rx_private";
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_12:key_12{
+                       key-name = "hdcp22_rx_fw";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_13:key_13{
+                       key-name = "hdcp14_rx";
+                       key-device = "normal";
+                       key-type  = "sha1";
+                       key-permit = "read","write","del";
+               };
+               keysn_14:key_14{
+                       key-name = "prpubkeybox";// PlayReady
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_15:key_15{
+                       key-name = "prprivkeybox";// PlayReady
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_16:key_16{
+                       key-name = "lcd";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_17:key_17{
+                       key-name = "lcd_extern";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_18:key_18{
+                       key-name = "backlight";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_19:key_19{
+                       key-name = "lcd_tcon";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_20:key_20{
+                       key-name = "attestationkeybox";// attestation key
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_21:key_21{
+                       key-name = "hdcp22_rprx_fw";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_22:key_22{
+                       key-name = "hdcp22_rprp_fw";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_23:key_23{
+                       key-name = "hdcp22_rp_private";
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+       }; /* End unifykey */
+
+       amlvideo2_0 {
+               compatible = "amlogic, amlvideo2";
+               dev_name = "amlvideo2";
+               status = "okay";
+               amlvideo2_id = <0>;
+               cma_mode = <1>;
+       };
+
+       amlvideo2_1 {
+               compatible = "amlogic, amlvideo2";
+               dev_name = "amlvideo2";
+               status = "okay";
+               amlvideo2_id = <1>;
+               cma_mode = <1>;
+       };
+
+       hdmirx {
+               compatible = "amlogic, hdmirx_tm2";
+               #address-cells=<1>;
+               #size-cells=<1>;
+               memory-region = <&hdmirx_emp_cma_reserved>;
+               status = "okay";
+               pinctrl-names = "hdmirx_pins";
+               pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+                       &hdmirx_c_mux>;
+               repeat = <0>;
+               interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+                          <&clkc CLKID_HDMIRX_CFG_COMP>,
+                          <&clkc CLKID_HDMIRX_ACR_COMP>,
+                          <&clkc CLKID_HDMIRX_METER_COMP>,
+                          <&clkc CLKID_HDMIRX_AXI_COMP>,
+                          <&xtal>,
+                          <&clkc CLKID_FCLK_DIV5>,
+                          <&clkc CLKID_FCLK_DIV7>,
+                          <&clkc CLKID_HDCP22_SKP_COMP>,
+                          <&clkc CLKID_HDCP22_ESM_COMP>;
+               //         <&clkc CLK_AUD_PLL2FS>,
+               //         <&clkc CLK_AUD_PLL4FS>,
+               //         <&clkc CLK_AUD_OUT>;
+               clock-names = "hdmirx_modet_clk",
+                       "hdmirx_cfg_clk",
+                               "hdmirx_acr_ref_clk",
+                               "cts_hdmirx_meter_clk",
+                               "cts_hdmi_axi_clk",
+                               "xtal",
+                               "fclk_div5",
+                               "fclk_div7",
+                               "hdcp_rx22_skp",
+                               "hdcp_rx22_esm";
+               //              "hdmirx_aud_pll2fs",
+               //              "hdmirx_aud_pll4f",
+               //              "clk_aud_out";
+               hdmirx_id = <0>;
+               en_4k_2_2k = <0>;
+               hpd_low_cec_off = <1>;
+               /* bit4: enable feature, bit3~0: port number */
+               disable_port = <0x0>;
+               /* MAP_ADDR_MODULE_CBUS */
+               /* MAP_ADDR_MODULE_HIU */
+               /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+               /* MAP_ADDR_MODULE_SEC_AHB */
+               /* MAP_ADDR_MODULE_SEC_AHB2 */
+               /* MAP_ADDR_MODULE_APB4 */
+               /* MAP_ADDR_MODULE_TOP */
+               reg = < 0x0 0x0
+                       0xff63C000 0x2000
+                       0xffe0d000 0x2000
+                       0x0 0x0
+                       0x0 0x0
+                       0x0 0x0
+                       0xff610000 0xa000>;
+       };
+
+       amhdmitx: amhdmitx {
+               compatible = "amlogic, amhdmitx";
+               dev_name = "amhdmitx";
+               status = "okay";
+               repeater_tx = <0x0>;
+       };
+
+       aocec: aocec {
+               compatible = "amlogic, aocec-tm2";
+               /*device_name = "aocec";*/
+               status = "okay";
+               vendor_name = "Amlogic"; /* Max Chars: 8         */
+               /* Refer to the following URL at:
+                * http://standards.ieee.org/develop/regauth/oui/oui.txt
+                */
+               vendor_id = <0x000000>;
+               product_desc = "TM2"; /* Max Chars: 16    */
+               cec_osd_string = "AML_TV"; /* Max Chars: 14    */
+               port_num = <4>;
+               ee_cec;
+               /*cec_sel = <2>;*/
+               output = <1>;   /*output port number*/
+               arc_port_mask = <0x2>;
+               interrupts = <0 203 1
+                                       0 199 1>;
+               interrupt-names = "hdmi_aocecb","hdmi_aocec";
+               pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+               pinctrl-0=<&aoceca_mux>;
+               pinctrl-1=<&aocecb_mux>;
+               pinctrl-2=<&aoceca_mux>;
+               reg = <0xFF80023c 0x4
+                          0xFF800000 0x400>;
+               reg-names = "ao_exit","ao";
+       };
+
+       p_tsensor: p_tsensor@ff634800 {
+               compatible = "amlogic, r1p1-tsensor";
+               status = "okay";
+               reg = <0xff634800 0x50>,
+                       <0xff800268 0x4>;
+               cal_type = <0x1>;
+               cal_a = <324>;
+               cal_b = <424>;
+               cal_c = <3159>;
+               cal_d = <9411>;
+               rtemp = <115000>;
+               interrupts = <0 35 0>;
+               clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+               clock-names = "ts_comp";
+               #thermal-sensor-cells = <1>;
+       };
+
+       d_tsensor: d_tsensor@ff634c00 {
+               compatible = "amlogic, r1p1-tsensor";
+               status = "okay";
+               reg = <0xff634c00 0x50>,
+                       <0xff800230 0x4>;
+               cal_type = <0x1>;
+               cal_a = <324>;
+               cal_b = <424>;
+               cal_c = <3159>;
+               cal_d = <9411>;
+               rtemp = <115000>;
+               interrupts = <0 36 0>;
+               clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+               clock-names = "ts_comp";
+               #thermal-sensor-cells = <1>;
+       };
+
+       s_tsensor: s_tsensor@ff635000 {
+               compatible = "amlogic, r1p1-tsensor";
+               status = "okay";
+               reg = <0xff635000 0x50>,
+                       <0xff80026c 0x4>;
+               cal_type = <0x1>;
+               cal_a = <324>;
+               cal_b = <424>;
+               cal_c = <3159>;
+               cal_d = <9411>;
+               rtemp = <115000>;
+               interrupts = <0 38 0>;
+               clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+               clock-names = "ts_comp";
+               #thermal-sensor-cells = <1>;
+       };
+
+       meson_cooldev: meson-cooldev@0 {
+               status = "okay";
+               compatible = "amlogic, meson-cooldev";
+               cooling_devices {
+                       cpufreq_cool_cluster0 {
+                               min_state = <1000000>;
+                               dyn_coeff = <140>;
+                               gpu_pp = <2>;
+                               cluster_id = <0>;
+                               node_name = "cpufreq_cool0";
+                               device_type = "cpufreq";
+                       };
+                       cpucore_cool_cluster0 {
+                               min_state = <1>;
+                               dyn_coeff = <0>;
+                               gpu_pp = <2>;
+                               cluster_id = <0>;
+                               node_name = "cpucore_cool0";
+                               device_type = "cpucore";
+                       };
+                       gpufreq_cool {
+                               min_state = <400>;
+                               dyn_coeff = <160>;
+                               gpu_pp = <2>;
+                               cluster_id = <0>;
+                               node_name = "gpufreq_cool0";
+                               device_type = "gpufreq";
+                       };
+                       gpucore_cool {
+                               min_state = <1>;
+                               dyn_coeff = <0>;
+                               gpu_pp = <2>;
+                               cluster_id = <0>;
+                               node_name = "gpucore_cool0";
+                               device_type = "gpucore";
+                       };
+               };
+               cpufreq_cool0:cpufreq_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+               cpucore_cool0:cpucore_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+               gpufreq_cool0:gpufreq_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+               gpucore_cool0:gpucore_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+       };/*meson cooling devices end*/
+
+       thermal-zones {
+               pll_thermal: pll_thermal {
+                       polling-delay = <1000>;
+                       polling-delay-passive = <100>;
+                       sustainable-power = <1230>;
+                       thermal-sensors = <&p_tsensor 0>;
+                       trips {
+                               pswitch_on: trip-point@0 {
+                                       temperature = <60000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               pcontrol: trip-point@1 {
+                                       temperature = <75000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               phot: trip-point@2 {
+                                       temperature = <85000>;
+                                       hysteresis = <5000>;
+                                       type = "hot";
+                               };
+                               pcritical: trip-point@3 {
+                                       temperature = <110000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+                       cooling-maps {
+                               cpufreq_cooling_map {
+                                       trip = <&pcontrol>;
+                                       cooling-device = <&cpufreq_cool0 0 11>;
+                                       contribution = <1024>;
+                               };
+                               cpucore_cooling_map {
+                                       trip = <&pcontrol>;
+                                       cooling-device = <&cpucore_cool0 0 4>;
+                                       contribution = <1024>;
+                               };
+                               gpufreq_cooling_map {
+                                       trip = <&pcontrol>;
+                                       cooling-device = <&gpufreq_cool0 0 4>;
+                                       contribution = <1024>;
+                               };
+                       };
+               };
+               ddr_thermal: ddr_thermal {
+                       polling-delay = <2000>;
+                       polling-delay-passive = <1000>;
+                       sustainable-power = <1230>;
+                       thermal-sensors = <&d_tsensor 1>;
+                       trips {
+                               dswitch_on: trip-point@0 {
+                                       temperature = <60000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               dcontrol: trip-point@1 {
+                                       temperature = <75000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               dhot: trip-point@2 {
+                                       temperature = <85000>;
+                                       hysteresis = <5000>;
+                                       type = "hot";
+                               };
+                               dcritical: trip-point@3 {
+                                       temperature = <110000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+               sar_thermal: sar_thermal {
+                       polling-delay = <2000>;
+                       polling-delay-passive = <1000>;
+                       sustainable-power = <1230>;
+                       thermal-sensors = <&s_tsensor 2>;
+                       trips {
+                               sswitch_on: trip-point@0 {
+                                       temperature = <60000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               scontrol: trip-point@1 {
+                                       temperature = <75000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               shot: trip-point@2 {
+                                       temperature = <85000>;
+                                       hysteresis = <5000>;
+                                       type = "hot";
+                               };
+                               scritical: trip-point@3 {
+                                       temperature = <110000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+       }; /*thermal zone end*/
+
+       cpu_opp_table0: cpu_opp_table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp00 {
+                       opp-hz = /bits/ 64 <100000000>;
+                       opp-microvolt = <730000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <250000000>;
+                       opp-microvolt = <730000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <730000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <667000000>;
+                       opp-microvolt = <750000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <770000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <780000>;
+               };
+               opp06 {
+                       opp-hz = /bits/ 64 <1404000000>;
+                       opp-microvolt = <790000>;
+               };
+               opp07 {
+                       opp-hz = /bits/ 64 <1500000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp08 {
+                       opp-hz = /bits/ 64 <1608000000>;
+                       opp-microvolt = <810000>;
+               };
+               opp09 {
+                       opp-hz = /bits/ 64 <1704000000>;
+                       opp-microvolt = <850000>;
+               };
+               opp10 {
+                       opp-hz = /bits/ 64 <1800000000>;
+                       opp-microvolt = <900000>;
+               };
+               opp11 {
+                       opp-hz = /bits/ 64 <1908000000>;
+                       opp-microvolt = <950000>;
+               };
+       };
+
+       cpufreq-meson {
+               compatible = "amlogic, cpufreq-meson";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm_ao_d_pins3>;
+               status = "okay";
+       };
+
+       tuner: tuner {
+               compatible = "amlogic, tuner";
+               status = "okay";
+               tuner_cur = <0>; /* default use tuner */
+               tuner_num = <1>; /* tuner number, multi tuner support */
+               tuner_name_0 = "si2151_tuner";
+               tuner_i2c_adap_0 = <&i2c0>;
+               tuner_i2c_addr_0 = <0x60>;
+               /* tuner_xtal_0 = <0>; */ /* unuse for si2151 */
+               /* tuner_xtal_mode_0 = <0>; */
+               /* tuner_xtal_cap_0 = <0>; */
+       };
+
+       atv-demod {
+               compatible = "amlogic, atv-demod";
+               status = "okay";
+               tuner = <&tuner>;
+               btsc_sap_mode = <1>;
+               interrupts = <0 236 1>;
+               /* pinctrl-names="atvdemod_agc_pins"; */
+               /* pinctrl-0=<&atvdemod_agc_pins>; */
+               reg = <0xff656000 0x2000 /* demod reg */
+                               0xff63c000 0x2000 /* hiu reg */
+                               0xff634000 0x2000 /* periphs reg */
+                               0xff64a000 0x2000>; /* audio reg */
+               reg_23cf = <0x88188832>;
+               /*default:0x88188832;r840 on haier:0x48188832*/
+       };
+
+       bt-dev{
+               compatible = "amlogic, bt-dev";
+               status = "okay";
+               gpio_reset = <&gpio       GPIOC_13       GPIO_ACTIVE_HIGH>;
+       };
+
+       wifi{
+               compatible = "amlogic, aml_wifi";
+               status = "okay";
+               interrupt_pin = <&gpio       GPIOC_12       GPIO_ACTIVE_HIGH>;
+               irq_trigger_type = "GPIO_IRQ_LOW";
+               dhd_static_buf;    //dhd_static_buf support
+               power_on_pin = <&gpio       GPIOC_11       GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm_b_pins1>;
+               pwm_config = <&wifi_pwm_conf>;
+       };
+
+       wifi_pwm_conf:wifi_pwm_conf{
+               pwm_channel1_conf {
+                       pwms = <&pwm_ab MESON_PWM_1 30541 0>;
+                       duty-cycle = <15270>;
+                       times = <8>;
+               };
+               pwm_channel2_conf {
+                       pwms = <&pwm_ab MESON_PWM_3 30500 0>;
+                       duty-cycle = <15250>;
+                       times = <12>;
+               };
+       };
+
+       sd_emmc_b: sdio@ffe05000 {
+               status = "okay";
+               compatible = "amlogic, meson-mmc-tm2";
+               reg = <0xffe05000 0x800>;
+               interrupts = <0 190 4>;
+
+               pinctrl-names = "sdio_all_pins",
+                       "sdio_clk_cmd_pins";
+               pinctrl-0 = <&sdio_all_pins>;
+               pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+               clocks = <&clkc CLKID_SD_EMMC_B>,
+                       <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+                       <&clkc CLKID_FCLK_DIV2>,
+                       <&clkc CLKID_FCLK_DIV5>,
+                       <&xtal>;
+               clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+               bus-width = <4>;
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               max-frequency = <100000000>;
+               disable-wp;
+               sdio {
+                       pinname = "sdio";
+                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+                       caps = "MMC_CAP_4_BIT_DATA",
+                               "MMC_CAP_MMC_HIGHSPEED",
+                               "MMC_CAP_SD_HIGHSPEED",
+                               "MMC_CAP_NONREMOVABLE", /**ptm debug */
+                                "MMC_CAP_UHS_SDR12",
+                                "MMC_CAP_UHS_SDR25",
+                                "MMC_CAP_UHS_SDR50",
+                                "MMC_CAP_UHS_SDR104",
+                                "MMC_PM_KEEP_POWER",
+                                "MMC_CAP_SDIO_IRQ";
+                       f_min = <400000>;
+                       f_max = <200000000>;
+                       max_req_size = <0x20000>; /**128KB*/
+                       card_type = <3>;
+                       /* 3:sdio device(ie:sdio-wifi),
+                        * 4:SD combo (IO+mem) card
+                        */
+               };
+       };
+
+/*     sd_emmc_b: sd@ffe05000 {
+ *             status = "okay";
+ *             compatible = "amlogic, meson-mmc-tm2";
+ *             reg = <0xffe05000 0x800>;
+ *             interrupts = <0 190 1>;
+ *
+ *             pinctrl-names = "sd_all_pins",
+ *                     "sd_clk_cmd_pins",
+ *                     "sd_1bit_pins";
+ *             pinctrl-0 = <&sd_all_pins>;
+ *             pinctrl-1 = <&sd_clk_cmd_pins>;
+ *             pinctrl-2 = <&sd_1bit_pins>;
+ *
+ *             clocks = <&clkc CLKID_SD_EMMC_B>,
+ *                     <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ *                     <&clkc CLKID_FCLK_DIV2>,
+ *                     <&clkc CLKID_FCLK_DIV5>,
+ *                     <&xtal>;
+ *             clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+ *
+ *             bus-width = <4>;
+ *             cap-sd-highspeed;
+ *             cap-mmc-highspeed;
+ *             max-frequency = <100000000>;
+ *             disable-wp;
+ *             sd {
+ *                     pinname = "sd";
+ *                     ocr_avail = <0x200080>;
+ *                     caps = "MMC_CAP_4_BIT_DATA",
+ *                             "MMC_CAP_MMC_HIGHSPEED",
+ *                             "MMC_CAP_SD_HIGHSPEED";
+ *                     f_min = <400000>;
+ *                     f_max = <200000000>;
+ *                     max_req_size = <0x20000>;
+ *                     no_sduart = <1>;
+ *                     gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ *                     jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ *                     gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ *                     card_type = <5>;
+ *             };
+ *     };
+ */
+
+}; /* end of / */
+
+&i2c0 {
+       status = "okay";
+       clock-frequency = <300000>;
+       pinctrl-names="default";
+       pinctrl-0=<&i2c0_dv_pins>;
+};
+
+&audiobus {
+       tdma:tdm@0 {
+               compatible = "amlogic, tm2-snd-tdma";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0>;
+               dai-tdm-lane-slot-mask-out = <1 1 1 1>;
+               dai-tdm-clk-sel = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+                               &clkc CLKID_MPLL0>;
+               clock-names = "mclk", "clk_srcpll";
+
+               pinctrl-names = "tdm_pins";
+               pinctrl-0 = <&tdma_mclk &tdmout_a>;
+       };
+
+       tdmb:tdm@1 {
+               compatible = "amlogic, tm2-snd-tdmb";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+               dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+               dai-tdm-clk-sel = <1>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+                               &clkc CLKID_MPLL1>;
+               clock-names = "mclk", "clk_srcpll";
+
+               status = "okay";
+       };
+
+       tdmc:tdm@2 {
+               compatible = "amlogic, tm2-snd-tdmc";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+               dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+               dai-tdm-clk-sel = <2>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+                               &clkc CLKID_MPLL2>;
+               clock-names = "mclk", "clk_srcpll";
+
+               pinctrl-names = "tdm_pins";
+               pinctrl-0 = <&tdmout_c &tdmin_c>;
+
+               status = "okay";
+       };
+
+       tdmlb:tdm@3 {
+               compatible = "amlogic, tm2-snd-tdmlb";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-lb-slot-mask-in = <1 0 0 0>;
+               dai-tdm-clk-sel = <1>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+                               &clkc CLKID_MPLL1>;
+               clock-names = "mclk", "clk_srcpll";
+
+               /*
+                * select tdmin_lb src;
+                * AXG
+                *  0: TDMOUTA
+                *  1: TDMOUTB
+                *  2: TDMOUTC
+                *  3: PAD_TDMINA
+                *  4: PAD_TDMINB
+                *  5: PAD_TDMINC
+                *
+                * G12A/G12B
+                *  0: TDMOUTA
+                *  1: TDMOUTB
+                *  2: TDMOUTC
+                *  3: PAD_TDMINA_DIN*
+                *  4: PAD_TDMINB_DIN*
+                *  5: PAD_TDMINC_DIN*
+                *  6: PAD_TDMINA_D*, oe pin
+                *  7: PAD_TDMINB_D*, oe pin
+                *
+                * TL1/SM1
+                *  0: TDMOUTA
+                *  1: TDMOUTB
+                *  2: TDMOUTC
+                *  3: PAD_TDMINA_DIN*
+                *  4: PAD_TDMINB_DIN*
+                *  5: PAD_TDMINC_DIN*
+                *  6: PAD_TDMINA_D*
+                *  7: PAD_TDMINB_D*
+                *  8: PAD_TDMINC_D*
+                *  9: HDMIRX_I2S
+                *  10: ACODEC_ADC
+                */
+               lb-src-sel = <1>;
+
+               status = "disabled";
+       };
+
+       pdm:pdm {
+               compatible = "amlogic, tm2-snd-pdm";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+                       &clkc CLKID_FCLK_DIV3
+                       &clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_PDMIN0
+                       &clkaudio CLKID_AUDIO_PDMIN1>;
+               clock-names = "gate",
+                       "sysclk_srcpll",
+                       "dclk_srcpll",
+                       "pdm_dclk",
+                       "pdm_sysclk";
+
+               pinctrl-names = "pdm_pins";
+               pinctrl-0 = <&pdmin>;
+
+               /* mode 0~4, defalut:1 */
+               filter_mode = <1>;
+
+               status = "okay";
+       };
+
+       spdifa:spdif@0 {
+               compatible = "amlogic, tm2-snd-spdif-a";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkc CLKID_MPLL1
+                               &clkc CLKID_FCLK_DIV4
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+                               &clkaudio CLKID_AUDIO_SPDIFIN
+                               &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+               clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+                               "gate_spdifout", "clk_spdifin", "clk_spdifout";
+
+               interrupts =
+                               <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_spdifin";
+
+               pinctrl-names = "spdif_pins",
+                               "spdif_pins_mute";
+               pinctrl-0 = <&spdifin_a>;
+               //pinctrl-1 = <&spdifout_a_mute>;
+
+               /*
+                * whether do asrc for pcm and resample a or b
+                * if raw data, asrc is disabled automatically
+                * 0: "Disable",
+                * 1: "Enable:32K",
+                * 2: "Enable:44K",
+                * 3: "Enable:48K",
+                * 4: "Enable:88K",
+                * 5: "Enable:96K",
+                * 6: "Enable:176K",
+                * 7: "Enable:192K",
+                */
+               asrc_id = <0>;
+               auto_asrc = <3>;
+
+               /*spdif clk tuning enable*/
+               clk_tuning_enable = <1>;
+               status = "okay";
+       };
+
+       spdifb:spdif@1 {
+               compatible = "amlogic, tm2-snd-spdif-b";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+                               &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+               clock-names = "sysclk",
+                               "gate_spdifout", "clk_spdifout";
+
+               status = "okay";
+       };
+
+       extn:extn {
+               compatible = "amlogic, snd-extn";
+               #sound-dai-cells = <0>;
+
+               interrupts =
+                               <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_frhdmirx";
+
+               status = "okay";
+       };
+
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <0>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0xff>;
+
+               status = "okay";
+       };
+
+       asrca: resample@0 {
+               compatible = "amlogic, tl1-resample-a";
+               clocks = <&clkc CLKID_MPLL0
+                               &clkaudio CLKID_AUDIO_MCLK_A
+                               &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+               clock-names = "resample_pll", "resample_src", "resample_clk";
+               /*same with toddr_src
+                *      TDMIN_A, 0
+                *      TDMIN_B, 1
+                *      TDMIN_C, 2
+                *      SPDIFIN, 3
+                *      PDMIN,  4
+                *      NONE,
+                *      TDMIN_LB, 6
+                *      LOOPBACK, 7
+                */
+               resample_module = <3>;
+
+               status = "disabled";
+       };
+
+       asrcb: resample@1 {
+               compatible = "amlogic, tl1-resample-b";
+
+               clocks = <&clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_MCLK_F
+                       &clkaudio CLKID_AUDIO_RESAMPLE_B>;
+               clock-names = "resample_pll", "resample_src", "resample_clk";
+
+               /*same with toddr_src
+                *      TDMIN_A, 0
+                *      TDMIN_B, 1
+                *      TDMIN_C, 2
+                *      SPDIFIN, 3
+                *      PDMIN,  4
+                *      NONE,
+                *      TDMIN_LB, 6
+                *      LOOPBACK, 7
+                */
+               resample_module = <3>;
+
+               status = "disabled";
+       };
+
+       vad:vad {
+               compatible = "amlogic, snd-vad";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_VAD>;
+               clock-names = "gate", "pll", "clk";
+
+               interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING
+                               GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_wakeup", "irq_frame_sync";
+
+               /*
+                * Data src sel:
+                * 0: tdmin_a;
+                * 1: tdmin_b;
+                * 2: tdmin_c;
+                * 3: spdifin;
+                * 4: pdmin;
+                * 5: loopback_b;
+                * 6: tdmin_lb;
+                * 7: loopback_a;
+                */
+               src = <4>;
+
+               /*
+                * deal with hot word in user space or kernel space
+                * 0: in user space
+                * 1: in kernel space
+                */
+               level = <1>;
+
+               status = "okay";
+       };
+
+       loopbacka:loopback@0 {
+               compatible = "amlogic, tm2-loopbacka";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+                       &clkc CLKID_FCLK_DIV3
+                       &clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_PDMIN0
+                       &clkaudio CLKID_AUDIO_PDMIN1
+                       &clkc CLKID_MPLL0
+                       &clkaudio CLKID_AUDIO_MCLK_A>;
+               clock-names = "pdm_gate",
+                       "pdm_sysclk_srcpll",
+                       "pdm_dclk_srcpll",
+                       "pdm_dclk",
+                       "pdm_sysclk",
+                       "tdminlb_mpll",
+                       "tdminlb_mclk";
+
+               /* datain src
+                * 0: tdmin_a;
+                * 1: tdmin_b;
+                * 2: tdmin_c;
+                * 3: spdifin;
+                * 4: pdmin;
+                */
+               datain_src = <4>;
+               datain_chnum = <4>;
+               datain_chmask = <0xf>;
+               /* config which data pin for loopback */
+               datain-lane-mask-in = <1 0 1 0>;
+
+               /* calc mclk for datalb */
+               mclk-fs = <256>;
+
+               /* tdmin_lb src
+                * 0: tdmoutA
+                * 1: tdmoutB
+                * 2: tdmoutC
+                * 3: PAD_TDMINA_DIN*, refer to core pinmux
+                * 4: PAD_TDMINB_DIN*, refer to core pinmux
+                * 5: PAD_TDMINC_DIN*, refer to core pinmux
+                * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+                * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+                */
+               /* if tdmin_lb >= 3, use external loopback */
+               datalb_src = <0>;
+               datalb_chnum = <2>;
+               datalb_chmask = <0x3>;
+               /* config which data pin as loopback */
+               datalb-lane-mask-in = <1 0 0 0>;
+
+               status = "okay";
+       };
+
+       loopbackb:loopback@1 {
+               compatible = "amlogic, tm2-loopbackb";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+                       &clkc CLKID_FCLK_DIV3
+                       &clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_PDMIN0
+                       &clkaudio CLKID_AUDIO_PDMIN1
+                       &clkc CLKID_MPLL0
+                       &clkaudio CLKID_AUDIO_MCLK_A>;
+               clock-names = "pdm_gate",
+                       "pdm_sysclk_srcpll",
+                       "pdm_dclk_srcpll",
+                       "pdm_dclk",
+                       "pdm_sysclk",
+                       "tdminlb_mpll",
+                       "tdminlb_mclk";
+
+               /* calc mclk for datain_lb */
+               mclk-fs = <256>;
+
+               /* datain src
+                * 0: tdmin_a;
+                * 1: tdmin_b;
+                * 2: tdmin_c;
+                * 3: spdifin;
+                * 4: pdmin;
+                */
+               datain_src = <4>;
+               datain_chnum = <4>;
+               datain_chmask = <0xf>;
+               /* config which data pin for loopback */
+               datain-lane-mask-in = <1 0 1 0>;
+
+               /* tdmin_lb src
+                * 0: tdmoutA
+                * 1: tdmoutB
+                * 2: tdmoutC
+                * 3: PAD_TDMINA_DIN*, refer to core pinmux
+                * 4: PAD_TDMINB_DIN*, refer to core pinmux
+                * 5: PAD_TDMINC_DIN*, refer to core pinmux
+                * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+                * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+                */
+               /* if tdmin_lb >= 3, use external loopback */
+               datalb_src = <1>;
+               datalb_chnum = <2>;
+               datalb_chmask = <0x3>;
+               /* config which data pin as loopback */
+               datalb-lane-mask-in = <1 0 0 0>;
+
+               status = "disabled";
+       };
+}; /* end of audiobus */
+
+&earc {
+       status = "okay";
+};
+
+&pinctrl_periphs {
+       /* audio pin mux */
+
+       tdma_mclk: tdma_mclk {
+               mux { /* GPIOH_4 */
+                       groups = "mclk0_h";
+                       function = "mclk0";
+               };
+       };
+
+       tdmout_a: tdmout_a {
+               mux { /* GPIOH_5, GPIOH_6, GPIOH_7, GPIOH_8, GPIOH_9, GPIOH_10*/
+                       groups = "tdma_fs_h",
+                               "tdma_sclk_h",
+                               "tdma_dout0_h",
+                               "tdma_dout1_h",
+                               "tdma_dout2_h",
+                               "tdma_dout3_h";
+                       function = "tdma_out";
+                       bias-pull-down;
+               };
+       };
+
+       tdmin_a: tdmin_a {
+               mux { /* GPIOH_11, GPIOH_12 */
+                       groups = "tdma_din0_h",
+                           "tdma_din1_h";
+                       function = "tdma_in";
+               };
+       };
+
+       tdmout_c: tdmout_c {
+               mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
+                       groups = "tdmc_sclk",
+                               "tdmc_fs",
+                               "tdmc_dout0";
+                       function = "tdmc_out";
+               };
+       };
+
+       tdmin_c: tdmin_c {
+               mux { /* GPIODV_10 */
+                       groups = "tdmc_din1";
+                       function = "tdmc_in";
+               };
+       };
+
+       spdifin_a: spdifin_a {
+               mux { /* GPIODV_5 */
+                       groups = "spdif_in";
+                       function = "spdif_in";
+               };
+       };
+
+       spdifout_a: spdifout_a {
+               mux { /* GPIODV_4 */
+                       groups = "spdif_out_dv4";
+                       function = "spdif_out";
+               };
+       };
+
+       spdifout_a_mute: spdifout_a_mute {
+               mux { /* GPIODV_4 */
+                       groups = "GPIODV_4";
+                       function = "gpio_periphs";
+               };
+       };
+
+       pdmin: pdmin {
+               mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */
+                       groups = "pdm_dclk_z",
+                               "pdm_din0_z",
+                               "pdm_din2_z4";
+                       function = "pdm";
+               };
+       };
+
+       /*backlight*/
+       bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+               mux {
+                       groups = "pwm_vs_z5";
+                       function = "pwm_vs";
+               };
+       };
+       bl_pwm_off_pins:bl_pwm_off_pin {
+               mux {
+                       groups = "GPIOZ_5";
+                       function = "gpio_periphs";
+                       output-low;
+               };
+       };
+       bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin {
+               mux {
+                       groups = "pwm_vs_z5";
+                       function = "pwm_vs";
+               };
+       };
+       bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin {
+               mux {
+                       groups = "pwm_vs_z6";
+                       function = "pwm_vs";
+               };
+       };
+       bl_pwm_combo_off_pins:bl_pwm_combo_off_pin {
+               mux {
+                       groups = "GPIOZ_5",
+                               "GPIOZ_6";
+                       function = "gpio_periphs";
+                       output-low;
+               };
+       };
+
+}; /* end of pinctrl_periphs */
+
+&audio_data{
+       status = "okay";
+};
+
+&i2c2 {
+       status = "okay";
+       pinctrl-names="default";
+       pinctrl-0=<&i2c2_h_pins>;
+       clock-frequency = <400000>;
+
+       /*****************************************************************/
+       tas5782m_pu1: tas5782m_pu1@48 {
+               compatible = "ti, tas5782m";
+               #sound-dai-cells = <0>;
+               reg = <0x48>;
+               reset_pin = <&gpio GPIOH_14 GPIO_ACTIVE_LOW>;
+               status = "okay";
+               codec_name = "tas5782m";
+               work_mode = <0>;  /*0: i2s 1:tdm*/
+               chip_offset = <1>; /*chip_N [1,2....]*/
+       };
+
+       tas5782m_pu2: tas5782m_pu2@49 {
+               compatible = "ti, tas5782m";
+               #sound-dai-cells = <0>;
+               reg = <0x49>;
+               status = "okay";
+               codec_name = "tas5782m";
+               work_mode = <0>;  /*0: i2s 1:tdm*/
+               chip_offset = <2>; /*chip_N [1,2....]*/
+       };
+
+       tas5782m_pu3: tas5782m_pu3@4a {
+               compatible = "ti, tas5782m";
+               #sound-dai-cells = <0>;
+               reg = <0x4a>;
+               status = "okay";
+               codec_name = "tas5782m";
+               work_mode = <0>;  /*0: i2s 1:tdm*/
+               chip_offset = <3>; /*chip_N [1,2....]*/
+       };
+
+       tas5782m_pu4: tas5782m_pu4@4b {
+               compatible = "ti, tas5782m";
+               #sound-dai-cells = <0>;
+               reg = <0x4b>;
+               status = "okay";
+               codec_name = "tas5782m";
+               work_mode = <0>;  /*0: i2s 1:tdm*/
+               chip_offset = <4>; /*chip_N [1,2....]*/
+       };
+       /*****************************************************************/
+
+       tas5805: tas5805@36 {
+               compatible = "ti,tas5805";
+               #sound-dai-cells = <0>;
+               codec_name = "tas5805";
+               reg = <0x2d>;
+               status = "disable";
+       };
+};
+
+&i2c3 {
+       status = "okay";
+       pinctrl-names="default";
+       pinctrl-0=<&i2c3_h1_pins>;
+       clock-frequency = <400000>;
+
+       ad82584f: ad82584f@60 {
+               compatible = "ESMT, ad82584f";
+               #sound-dai-cells = <0>;
+               reg = <0x30>;
+               status = "okay";
+               reset_pin = <&gpio GPIOH_13 0>;
+               no_mclk;
+       };
+       ad82584f1: ad82584f@62 {
+               compatible = "ESMT, ad82584f";
+               #sound-dai-cells = <0>;
+               reg = <0x31>;
+               status = "okay";
+               no_mclk;
+       };
+};
+
+&sd_emmc_c {
+       status = "okay";
+       emmc {
+               caps = "MMC_CAP_8_BIT_DATA",
+                        "MMC_CAP_MMC_HIGHSPEED",
+                        "MMC_CAP_SD_HIGHSPEED",
+                        "MMC_CAP_NONREMOVABLE",
+                        "MMC_CAP_1_8V_DDR",
+                        "MMC_CAP_HW_RESET",
+                        "MMC_CAP_ERASE",
+                        "MMC_CAP_CMD23";
+               caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
+               f_min = <400000>;
+               f_max = <200000000>;
+       };
+};
+
+&spifc {
+       status = "disabled";
+       spi-nor@0 {
+               cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&slc_nand {
+       status = "disabled";
+       plat-names = "bootloader", "nandnormal";
+       plat-num = <2>;
+       plat-part-0 = <&bootloader>;
+       plat-part-1 = <&nandnormal>;
+       bootloader: bootloader{
+               enable_pad = "ce0";
+               busy_pad = "rb0";
+               timming_mode = "mode5";
+               bch_mode = "bch8_1k";
+               t_rea = <20>;
+               t_rhoh = <15>;
+               chip_num = <1>;
+               part_num = <0>;
+               rb_detect = <1>;
+       };
+       nandnormal: nandnormal{
+               enable_pad = "ce0";
+               busy_pad = "rb0";
+               timming_mode = "mode5";
+               bch_mode = "bch8_1k";
+               plane_mode = "twoplane";
+               t_rea = <20>;
+               t_rhoh = <15>;
+               chip_num = <2>;
+               part_num = <3>;
+               partition = <&nand_partitions>;
+               rb_detect = <1>;
+       };
+       nand_partitions:nand_partition{
+               /*
+                * if bl_mode is 1, tpl size was generate by
+                * fip_copies * fip_size which
+                * will not skip bad when calculating
+                * the partition size;
+                *
+                * if bl_mode is 0,
+                * tpl partition must be comment out.
+                */
+               tpl{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x0>;
+               };
+               logo{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x200000>;
+               };
+               recovery{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x1000000>;
+               };
+               boot{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x1000000>;
+               };
+               system{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x4000000>;
+               };
+               data{
+                       offset=<0xffffffff 0xffffffff>;
+                       size=<0x0 0x0>;
+               };
+       };
+};
+
+&ethmac {
+       status = "okay";
+       //pinctrl-names = "internal_eth_pins";
+       //pinctrl-0 = <&internal_eth_pins>;
+       mc_val = <0x4be04>;
+
+       internal_phy=<1>;
+};
+
+&uart_A {
+       status = "okay";
+};
+
+&dwc3 {
+       status = "okay";
+};
+
+&usb2_phy_v2 {
+       status = "okay";
+       portnum = <3>;
+};
+
+&usb3_phy_v2 {
+       status = "okay";
+       portnum = <0>;
+       portconfig-30 = <0>;
+       portconfig-31 = <0>;
+};
+
+&usb_otg {
+       status = "okay";
+       otg = <0>;
+};
+
+&dwc2_a {
+       status = "okay";
+       /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+       controller-type = <1>;
+};
+
+&pcie_A {
+       reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
+       status = "disable";
+};
+
+&pcie_B {
+       /* ab311 only pcie a, no pcie b */
+       status = "disable";
+};
+
+&spicc0 {
+       status = "disabled";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spicc0_pins_h>;
+       cs-gpios = <&gpio GPIOH_20 0>;
+};
+
+&meson_fb {
+       status = "okay";
+       display_size_default = <1920 1080 1920 2160 32>;
+       mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>;
+       logo_addr = "0x7f800000";
+       mem_alloc = <0>;
+       pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+};
+
+&pwm_AO_cd {
+       status = "okay";
+};
+
+&saradc {
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+       clock-frequency = <300000>;
+       pinctrl-names="default";
+       pinctrl-0=<&i2c1_h_pins>;
+
+       lcd_extern_i2c0: lcd_extern_i2c@0 {
+               compatible = "lcd_ext, i2c";
+               dev_name = "i2c_T5800Q";
+               reg = <0x1c>;
+               status = "okay";
+       };
+
+       lcd_extern_i2c1: lcd_extern_i2c@1 {
+               compatible = "lcd_ext, i2c";
+               dev_name = "i2c_ANX6862";
+               reg = <0x20>;
+               status = "okay";
+       };
+
+       lcd_extern_i2c2: lcd_extern_i2c@2 {
+               compatible = "lcd_ext, i2c";
+               dev_name = "i2c_ANX7911";
+               reg = <0x74>;
+               status = "okay";
+       };
+};
+
+&pwm_ab {
+       status = "okay";
+};
+
+&pwm_cd {
+       status = "okay";
+};
+
+&efuse {
+       status = "okay";
+};
+
index 2852e80..ace59b7 100644 (file)
        }; /* end of soc*/
 
        custom_maps: custom_maps {
-               mapnum = <3>;
+               mapnum = <4>;
                map0 = <&map_0>;
                map1 = <&map_1>;
                map2 = <&map_2>;
+               map3 = <&map_3>;
                map_0: map_0{
                        mapname = "amlogic-remote-1";
                        customcode = <0xfb04>;
                                REMOTE_KEY(0x9a,KEY_SCALE)
                                REMOTE_KEY(0xcd,KEY_KPCOMMA)>;
                };
+               map_3: map_3{
+                       mapname = "amlogic-remote-4";
+                       customcode = <0xa4e8>; /* Reference Remote Control */
+                       release_delay = <80>;
+                       size  = <45>;
+                       keymap = <
+                               REMOTE_KEY(0xc7, 200) /* power */
+                               REMOTE_KEY(0x93, 201) /* eject-->input source */
+                               REMOTE_KEY(0xb2, 202) /* usb */
+                               REMOTE_KEY(0xb8, 203) /* coaxial */
+                               REMOTE_KEY(0xb7, 204) /* aux */
+                               REMOTE_KEY(0x8a, 205) /* scan-->hdmi arc */
+                               REMOTE_KEY(0x96, 206) /* dimmer */
+                               REMOTE_KEY(0x90, 207) /* hdmi1 */
+                               REMOTE_KEY(0xa8, 208) /* hdmi2 */
+                               REMOTE_KEY(0x85, 209) /* mute */
+                               REMOTE_KEY(0x80, 210) /* vol+ */
+                               REMOTE_KEY(0x81, 211) /* vol- */
+                               REMOTE_KEY(0x61, 212) /* DAP */
+                               REMOTE_KEY(0x62, 213) /* BM */
+                               REMOTE_KEY(0x63, 214) /* DRC */
+                               REMOTE_KEY(0x64, 215) /* POST */
+                               REMOTE_KEY(0x65, 216) /* UPMIX */
+                               REMOTE_KEY(0x66, 217) /* VIRT */
+                               REMOTE_KEY(0x67, 218) /* LEGACY */
+                               REMOTE_KEY(0x68, 219) /* HFILT */
+                               REMOTE_KEY(0x69, 220) /* Loundness */
+                               REMOTE_KEY(0x60, 221) /* Audio_info */
+                               REMOTE_KEY(0xb1, 222) /* CD */
+                               REMOTE_KEY(0xb4, 223) /* CD */
+                               REMOTE_KEY(0xb9, 224) /* CD */
+                               REMOTE_KEY(0xab, 225) /* CD */
+                               REMOTE_KEY(0x91, 226) /* CD */
+                               REMOTE_KEY(0x92, 227) /* CD */
+                               REMOTE_KEY(0x89, 228) /* CD */
+                               REMOTE_KEY(0x88, 229) /* CD */
+                               REMOTE_KEY(0xa5, 230) /* CD */
+                               REMOTE_KEY(0x84, 231) /* CD */
+                               REMOTE_KEY(0x72, 232) /* CD */
+                               REMOTE_KEY(0x73, 233) /* CD */
+                               REMOTE_KEY(0x9a, 234) /* CD */
+                               REMOTE_KEY(0x9b, 235) /* CD */
+                               REMOTE_KEY(0xa0, 236) /* CD */
+                               REMOTE_KEY(0x71, 237) /* CD */
+                               REMOTE_KEY(0x74, 238) /* CD */
+                               REMOTE_KEY(0x75, 239) /* CD */
+                               REMOTE_KEY(0x7e, 240) /* CD */
+                               REMOTE_KEY(0x7f, 241) /* CD */
+                               REMOTE_KEY(0x7a, 242) /* CD */
+                               REMOTE_KEY(0xa7, 243) /* CD */
+                               REMOTE_KEY(0xa9, 244) /* CD */
+                               >;
+               };
        };
 
        uart_A: serial@ffd24000 {
diff --git a/arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts b/arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts
new file mode 100644 (file)
index 0000000..3e56454
--- /dev/null
@@ -0,0 +1,2195 @@
+/*
+ * arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311_sbr.dts
+ *
+ * Copyright (C) 2017 Amlogic, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ */
+
+/dts-v1/;
+
+#include "mesontm2.dtsi"
+#include "partition_mbox_normal_P_32.dtsi"
+
+/ {
+       model = "Amlogic TM2 T962E2 AB311";
+       amlogic-dt-id = "tm2_t962E2_ab311";
+       compatible = "amlogic, tm2_t962e2_ab311";
+
+       aliases {
+               serial0 = &uart_AO;
+               serial1 = &uart_A;
+               serial2 = &uart_B;
+               serial3 = &uart_C;
+               serial4 = &uart_AO_B;
+               tsensor0 = &p_tsensor;
+               tsensor1 = &d_tsensor;
+               tsensor2 = &s_tsensor;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c_AO;
+       };
+
+       memory@00000000 {
+               device_type = "memory";
+               linux,usable-memory = <0x0 0x0 0x0 0x80000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               /* global autoconfigured region for contiguous allocations */
+               ramoops@0x07400000 {
+                       compatible = "ramoops";
+                       reg = <0x0 0x07400000 0x0 0x00100000>;
+                       record-size = <0x8000>;
+                       console-size = <0x8000>;
+                       ftrace-size = <0x40000>;
+               };
+
+               secmon_reserved: linux,secmon {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x400000>;
+                       alignment = <0x0 0x400000>;
+                       alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
+               };
+
+               logo_reserved:linux,meson-fb {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x800000>;
+                       alignment = <0x0 0x400000>;
+                       alloc-ranges = <0x0 0x7f800000 0x0 0x800000>;
+               };
+
+               lcd_tcon_reserved:linux,lcd_tcon {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0xc00000>;
+                       alignment = <0x0 0x400000>;
+                       alloc-ranges = <0x0 0x7ec00000 0x0 0xc00000>;
+               };
+
+               codec_mm_cma:linux,codec_mm_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* ion_codec_mm max can alloc size 80M*/
+                       size = <0x0 0x13400000>;
+                       alignment = <0x0 0x400000>;
+                       linux,contiguous-region;
+               };
+
+               /* codec shared reserved */
+               codec_mm_reserved:linux,codec_mm_reserved {
+                       compatible = "amlogic, codec-mm-reserved";
+                       size = <0x0 0x0>;
+                       alignment = <0x0 0x100000>;
+                       //no-map;
+               };
+
+               ion_cma_reserved:linux,ion-dev {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x2000000>;
+                       alignment = <0x0 0x400000>;
+               };
+
+               /*  vdin0 CMA pool */
+               //vdin0_cma_reserved:linux,vdin0_cma {
+               //      compatible = "shared-dma-pool";
+               //      reusable;
+                       /* 3840x2160x4x4 ~=128 M */
+               //      size = <0x0 0xc400000>;
+               //      alignment = <0x0 0x400000>;
+               //};
+
+               /*  vdin1 CMA pool */
+               vdin1_cma_reserved:linux,vdin1_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* 1920x1080x2x4  =16 M */
+                       size = <0x0 0x1400000>;
+                       alignment = <0x0 0x400000>;
+               };
+
+               /*demod_reserved:linux,demod {
+                *      compatible = "amlogic, demod-mem";
+                *      size = <0x0 0x800000>; //8M //100m 0x6400000
+                *      alloc-ranges = <0x0 0x0 0x0 0x30000000>;
+                *      //multi-use;
+                *      //no-map;
+                *};
+                */
+
+               demod_cma_reserved:linux,demod_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* 8M */
+                       size = <0x0 0x0800000>;
+                       alignment = <0x0 0x400000>;
+               };
+
+               /*di CMA pool */
+               di_cma_reserved:linux,di_cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       /* buffer_size = 3621952(yuv422 8bit)
+                        *  | 4736064(yuv422 10bit)
+                        *  | 4074560(yuv422 10bit full pack mode)
+                        * 10x3621952=34.6M(0x23) support 8bit
+                        * 10x4736064=45.2M(0x2e) support 12bit
+                        * 10x4074560=40M(0x28) support 10bit
+                        */
+                       size = <0x0 0x02800000>;
+                       alignment = <0x0 0x400000>;
+               };
+
+               /* for hdmi rx emp use */
+               hdmirx_emp_cma_reserved:linux,emp_cma {
+                       compatible = "shared-dma-pool";
+                       /*linux,phandle = <5>;*/
+                       reusable;
+                       /* 4M for emp to ddr */
+                       /* 32M for tmds to ddr */
+                       size = <0x0 0x2000000>;
+                       alignment = <0x0 0x400000>;
+               };
+
+               /* POST PROCESS MANAGER */
+               ppmgr_reserved:linux,ppmgr {
+                       compatible = "amlogic, ppmgr_memory";
+                       size = <0x0 0x0>;
+               };
+
+               picdec_cma_reserved:linux,picdec {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x0>;
+                       alignment = <0x0 0x0>;
+                       linux,contiguous-region;
+               };
+
+               dsp_fw_reserved:linux,dsp_fw {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x01000000>;
+                       alignment = <0x0 0x00400000>;
+                       alloc-ranges = <0x0 0x30000000 0x0 0x01000000>;
+               };
+       }; /* end of reserved-memory */
+       galcore {
+               status = "okay";
+       };
+       codec_mm {
+               compatible = "amlogic, codec, mm";
+               status = "okay";
+               memory-region = <&codec_mm_cma &codec_mm_reserved>;
+       };
+
+       picdec {
+               compatible = "amlogic, picdec";
+               memory-region = <&picdec_cma_reserved>;
+               dev_name = "picdec";
+               status = "okay";
+       };
+
+       ppmgr {
+               compatible = "amlogic, ppmgr";
+               memory-region = <&ppmgr_reserved>;
+               status = "okay";
+       };
+
+       deinterlace {
+               compatible = "amlogic, deinterlace";
+               status = "okay";
+               /* 0:use reserved; 1:use cma; 2:use cma as reserved */
+               flag_cma = <1>;
+               //memory-region = <&di_reserved>;
+               memory-region = <&di_cma_reserved>;
+               interrupts = <0 46 1
+                               0 40 1>;
+               interrupt-names = "pre_irq", "post_irq";
+               clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
+                       <&clkc CLKID_VPU_CLKB_COMP>;
+               clock-names = "vpu_clkb_tmp_composite",
+                       "vpu_clkb_composite";
+               clock-range = <334 667>;
+               /* buffer-size = <3621952>;(yuv422 8bit) */
+               buffer-size = <4074560>;/*yuv422 fullpack*/
+               /* reserve-iomap = "true"; */
+               /* if enable nr10bit, set nr10bit-support to 1 */
+               post-wr-support = <1>;
+               nr10bit-support = <1>;
+               nrds-enable = <1>;
+               pps-enable = <1>;
+       };
+
+       vout {
+               compatible = "amlogic, vout";
+               status = "okay";
+               fr_auto_policy = <0>;
+       };
+
+       /* Audio Related start */
+       pdm_codec:dummy {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, pdm_dummy_codec";
+               status = "okay";
+       };
+
+       dummy_codec:dummy {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, aml_dummy_codec";
+               status = "okay";
+       };
+
+       tl1_codec:codec {
+               #sound-dai-cells = <0>;
+               compatible = "amlogic, tl1_acodec";
+               status = "okay";
+               reg = <0x0 0xff632000 0x0 0x1c>;
+               tdmout_index = <0>;
+               tdmin_index = <0>;
+               dat1_ch_sel = <1>;
+       };
+
+       aml_dtv_demod {
+               compatible = "amlogic, ddemod-tm2";
+               dev_name = "aml_dtv_demod";
+               status = "okay";
+
+               //pinctrl-names="dtvdemod_agc";
+               //pinctrl-0=<&dtvdemod_agc>;
+
+               clocks = <&clkc CLKID_DAC_CLK>;
+               clock-names = "vdac_clk_gate";
+
+               reg = <0x0 0xff650000 0x0 0x4000        /*dtv demod base*/
+                          0x0 0xff63c000 0x0 0x2000    /*hiu reg base*/
+                          0x0 0xff800000 0x0 0x1000    /*io_aobus_base*/
+                          0x0 0xffd01000 0x0 0x1000    /*reset*/
+                       >;
+
+               dtv_demod0_mem = <0>;   // need move to aml_dtv_demod ?
+               spectrum = <1>;
+               cma_flag = <1>;
+               cma_mem_size = <8>;
+               memory-region = <&demod_cma_reserved>;//<&demod_reserved>;
+       };
+
+       auge_sound {
+               compatible = "amlogic, tm2-sound-card";
+               aml-audio-card,name = "AML-AUGESOUND";
+
+               avout_mute-gpios = <&gpio GPIODV_3 GPIO_ACTIVE_HIGH>;
+
+               aml-audio-card,dai-link@0 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       //bitclock-master = <&tdma>;
+                       //frame-master = <&tdma>;
+                       /* slave mode */
+                       /*
+                        * bitclock-master = <&tdmacodec>;
+                        * frame-master = <&tdmacodec>;
+                        */
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-i2s";
+                       tdmacpu: cpu {
+                               sound-dai = <&tdma>;
+                               dai-tdm-slot-tx-mask =
+                                                       <1 1>;
+                               dai-tdm-slot-rx-mask =
+                                                       <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmacodec: codec {
+                               //sound-dai = <&dummy_codec>;
+                               //prefix-names = "AMP", "AMP1";
+                               //sound-dai = <&ad82584f &ad82584f1 &tl1_codec>;
+                               prefix-names = "AMP", "AMP1", "tas5782m_pu1",
+                               "tas5782m_pu2", "tas5782m_pu3", "tas5782m_pu4";
+                               sound-dai = <&ad82584f &ad82584f1 &tas5782m_pu1
+                               &tas5782m_pu2 &tas5782m_pu3 &tas5782m_pu4>;
+                       };
+               };
+
+               aml-audio-card,dai-link@1 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdmb>;
+                       frame-master = <&tdmb>;
+                       /* slave mode */
+                       //bitclock-master = <&tdmbcodec>;
+                       //frame-master = <&tdmbcodec>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-pcm";
+                       cpu {
+                               sound-dai = <&tdmb>;
+                               dai-tdm-slot-tx-mask = <1 1>;
+                               dai-tdm-slot-rx-mask = <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               /*
+                                * dai-tdm-slot-tx-mask =
+                                *      <1 1 1 1 1 1 1 1>;
+                                * dai-tdm-slot-rx-mask =
+                                *      <1 1 1 1 1 1 1 1>;
+                                * dai-tdm-slot-num = <8>;
+                                */
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmbcodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@2 {
+                       format = "i2s";
+                       mclk-fs = <256>;
+                       //continuous-clock;
+                       //bitclock-inversion;
+                       //frame-inversion;
+                       /* master mode */
+                       bitclock-master = <&tdmc>;
+                       frame-master = <&tdmc>;
+                       /* slave mode */
+                       //bitclock-master = <&tdmccodec>;
+                       //frame-master = <&tdmccodec>;
+                       /* suffix-name, sync with android audio hal used for */
+                       //suffix-name = "alsaPORT-tdm";
+                       cpu {
+                               sound-dai = <&tdmc>;
+                               dai-tdm-slot-tx-mask = <1 1>;
+                               dai-tdm-slot-rx-mask = <1 1>;
+                               dai-tdm-slot-num = <2>;
+                               dai-tdm-slot-width = <32>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       tdmccodec: codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@3 {
+                       mclk-fs = <64>;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-pdm";
+                       cpu {
+                               sound-dai = <&pdm>;
+                       };
+                       codec {
+                               sound-dai = <&pdm_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@4 {
+                       mclk-fs = <128>;
+                       continuous-clock;
+                       /* suffix-name, sync with android audio hal used for */
+                       suffix-name = "alsaPORT-spdif";
+                       cpu {
+                               sound-dai = <&spdifa>;
+                               system-clock-frequency = <6144000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@5 {
+                       mclk-fs = <128>;
+                       suffix-name = "alsaPORT-spdifb";
+                       cpu {
+                               sound-dai = <&spdifb>;
+                               system-clock-frequency = <6144000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@6 {
+                       mclk-fs = <256>;
+                       suffix-name = "alsaPORT-tv";
+                       cpu {
+                               sound-dai = <&extn>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@7 {
+                       mclk-fs = <256>;
+                       suffix-name = "alsaPORT-earc";
+                       cpu {
+                               sound-dai = <&earc>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+
+               aml-audio-card,dai-link@8 {
+                       mclk-fs = <256>;
+                       continuous-clock;
+                       suffix-name = "alsaPORT-loopback";
+                       cpu {
+                               sound-dai = <&loopbacka>;
+                               system-clock-frequency = <12288000>;
+                       };
+                       codec {
+                               sound-dai = <&dummy_codec>;
+                       };
+               };
+       };
+       /* Audio Related end */
+
+       dvb {
+               compatible = "amlogic, dvb";
+               status = "okay";
+               fe0_mode = "internal";
+               fe0_tuner = <&tuner>;
+
+               /*"parallel","serial","disable"*/
+               ts2 = "parallel";
+               ts2_control = <0>;
+               ts2_invert = <0>;
+               interrupts = <0 23 1
+                               0 5 1
+                               0 53 1
+                               0 19 1
+                               0 25 1
+                               0 17 1>;
+               interrupt-names = "demux0_irq",
+                               "demux1_irq",
+                               "demux2_irq",
+                               "dvr0_irq",
+                               "dvr1_irq",
+                               "dvr2_irq";
+               clocks = <&clkc CLKID_DEMUX
+                       &clkc CLKID_ASYNC_FIFO
+                       &clkc CLKID_AHB_ARB0
+/*             &clkc CLKID_DOS_PARSER>;*/
+               &clkc CLKID_U_PARSER>;
+               clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
+       };
+
+       tvafe_avin_detect {
+               compatible = "amlogic, tm2_tvafe_avin_detect";
+               status = "okay";
+               device_mask = <1>;/*bit0:ch1;bit1:ch2*/
+               interrupts = <0 12 1>,
+                               <0 13 1>;
+       };
+
+       amlvecm {
+               compatible = "amlogic, vecm-tm2";
+               dev_name = "aml_vecm";
+               status = "okay";
+               gamma_en = <1>;/*1:enabel ;0:disable*/
+               wb_en = <1>;/*1:enabel ;0:disable*/
+               cm_en = <0>;/*1:enabel ;0:disable*/
+               wb_sel = <0>;/*1:mtx ;0:gainoff*/
+               vlock_en = <1>;/*1:enable;0:disable*/
+               vlock_mode = <0x4>;
+               /* vlock work mode:
+                *bit0:auto ENC
+                *bit1:auto PLL
+                *bit2:manual PLL
+                *bit3:manual ENC
+                *bit4:manual soft ENC
+                *bit5:manual MIX PLL ENC
+                */
+                vlock_pll_m_limit = <1>;
+                vlock_line_limit = <2>;
+       };
+
+       amdolby_vision {
+               compatible = "amlogic, dolby_vision_tm2";
+               dev_name = "aml_amdolby_vision_driver";
+               status = "okay";
+               tv_mode = <0>;/*1:enabel ;0:disable*/
+       };
+
+       vdin@0 {
+               compatible = "amlogic, vdin";
+               /*memory-region = <&vdin0_cma_reserved>;*/
+               status = "okay";
+               /*bit0:(1:share with codec_mm;0:cma alone)
+                *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+                */
+               flag_cma = <0x101>;
+               /*MByte, if 10bit disable: 64M(YUV422),
+                *if 10bit enable: 64*1.5 = 96M(YUV422)
+                *if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 200M
+                *if support 4K2K-YUV422-10bit-wr:3840*2160*3*6 ~= 160M
+                *if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
+                *if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
+                */
+               cma_size = <200>;
+               interrupts = <0 83 1>;
+               rdma-irq = <2>;
+               clocks = <&clkc CLKID_FCLK_DIV5>,
+                       <&clkc CLKID_VDIN_MEAS_COMP>;
+               clock-names = "fclk_div5", "cts_vdin_meas_clk";
+               vdin_id = <0>;
+               /*vdin write mem color depth support:
+                * bit0:support 8bit
+                * bit1:support 9bit
+                * bit2:support 10bit
+                * bit3:support 12bit
+                * bit4:support yuv422 10bit full pack mode (from txl new add)
+                * bit8:use 8bit  at 4k_50/60hz_10bit
+                * bit9:use 10bit at 4k_50/60hz_10bit
+                */
+               tv_bit_mode = <0x215>;
+               /* afbce_bit_mode: (amlogic frame buff compression encoder)
+                * bit0 -- enable afbce
+                * bit1 -- enable afbce compression-lossy
+                * bit4 -- afbce for 4k
+                * bit5 -- afbce for 1080p
+                * bit6 -- afbce for 720p
+                * bit7 -- afbce for smaller resolution
+                */
+               afbce_bit_mode = <0x0>;
+       };
+
+       vdin@1 {
+               compatible = "amlogic, vdin";
+               memory-region = <&vdin1_cma_reserved>;
+               status = "okay";
+               /*bit0:(1:share with codec_mm;0:cma alone)
+                *bit8:(1:alloc in discontinus way;0:alone in continuous way)
+                */
+               flag_cma = <0>;
+               interrupts = <0 85 1>;
+               rdma-irq = <4>;
+               clocks = <&clkc CLKID_FCLK_DIV5>,
+                       <&clkc CLKID_VDIN_MEAS_COMP>;
+               clock-names = "fclk_div5", "cts_vdin_meas_clk";
+               vdin_id = <1>;
+               /*vdin write mem color depth support:
+                *bit0:support 8bit
+                *bit1:support 9bit
+                *bit2:support 10bit
+                *bit3:support 12bit
+                */
+               tv_bit_mode = <0x15>;
+       };
+
+       tvafe {
+               compatible = "amlogic, tvafe-tm2";
+               /*memory-region = <&tvafe_cma_reserved>;*/
+               status = "okay";
+               flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
+               cma_size = <5>;/*MByte*/
+               reg = <0x0 0xff654000 0x0 0x2000>;/*tvafe reg base*/
+               reserve-iomap = "true";
+               tvafe_id = <0>;
+               //pinctrl-names = "default";
+               /*!!particular sequence, no more and no less!!!*/
+               tvafe_pin_mux = <
+                               3 /* TVAFE_CVBS_IN2, CVBS_IN0 = 0 */
+                               1 /* TVAFE_CVBS_IN0, CVBS_IN1 */
+                               2 /* TVAFE_CVBS_IN1, CVBS_IN2 */
+                               4 /* TVAFE_CVBS_IN3, CVBS_IN3 */
+               >;
+               clocks = <&clkc CLKID_DAC_CLK>;
+               clock-names = "vdac_clk_gate";
+
+               cutwindow_val_h = <0 0 0 0 8>; /* level 0~4 */
+               cutwindow_val_v = <4 8 14 16 24>;  /* level 0~4 */
+       };
+
+       vbi {
+               compatible = "amlogic, vbi";
+               status = "okay";
+               interrupts = <0 83 1>;
+       };
+
+       cvbsout {
+               compatible = "amlogic, cvbsout-tm2";
+               status = "disabled";
+               clocks = <&clkc CLKID_VCLK2_ENCI
+                       &clkc CLKID_VCLK2_VENCI0
+                       &clkc CLKID_VCLK2_VENCI1
+                       &clkc CLKID_DAC_CLK>;
+               clock-names = "venci_top_gate",
+                       "venci_0_gate",
+                       "venci_1_gate",
+                       "vdac_clk_gate";
+               /* clk path */
+               /* 0:vid_pll vid2_clk */
+               /* 1:gp0_pll vid2_clk */
+               /* 2:vid_pll vid1_clk */
+               /* 3:gp0_pll vid1_clk */
+               clk_path = <0>;
+
+               /* performance: reg_address, reg_value */
+               /* tm2 */
+               performance = <0x1bf0  0x9
+                       0x1b56  0x333
+                       0x1b12  0x8080
+                       0x1b05  0xfd
+                       0x1c59  0xf850
+                       0xffff  0x0>; /* ending flag */
+               performance_sarft = <0x1bf0  0x9
+                       0x1b56  0x333
+                       0x1b12  0x0
+                       0x1b05  0x9
+                       0x1c59  0xfc48
+                       0xffff  0x0>; /* ending flag */
+               performance_revB_telecom = <0x1bf0  0x9
+                       0x1b56  0x546
+                       0x1b12  0x8080
+                       0x1b05  0x9
+                       0x1c59  0xf850
+                       0xffff  0x0>; /* ending flag */
+       };
+
+       /* for external keypad */
+       adc_keypad {
+               compatible = "amlogic, adc_keypad";
+               status = "okay";
+               key_name = "power","up","down","enter","left","right","home";
+               key_num = <7>;
+               io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>;
+               io-channel-names = "key-chan-2", "key-chan-3";
+               key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
+                       SARADC_CH2 SARADC_CH3 SARADC_CH3>;
+               key_code = <116 103 108 28 105 106 102>;
+               key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
+               key_tolerance = <40 40 40 40 40 40 40>;
+};
+
+       unifykey {
+               compatible = "amlogic, unifykey";
+               status = "okay";
+
+               unifykey-num = <24>;
+               unifykey-index-0 = <&keysn_0>;
+               unifykey-index-1 = <&keysn_1>;
+               unifykey-index-2 = <&keysn_2>;
+               unifykey-index-3 = <&keysn_3>;
+               unifykey-index-4 = <&keysn_4>;
+               unifykey-index-5 = <&keysn_5>;
+               unifykey-index-6 = <&keysn_6>;
+               unifykey-index-7 = <&keysn_7>;
+               unifykey-index-8 = <&keysn_8>;
+               unifykey-index-9 = <&keysn_9>;
+               unifykey-index-10= <&keysn_10>;
+               unifykey-index-11 = <&keysn_11>;
+               unifykey-index-12 = <&keysn_12>;
+               unifykey-index-13 = <&keysn_13>;
+               unifykey-index-14 = <&keysn_14>;
+               unifykey-index-15 = <&keysn_15>;
+               unifykey-index-16 = <&keysn_16>;
+               unifykey-index-17 = <&keysn_17>;
+               unifykey-index-18 = <&keysn_18>;
+               unifykey-index-19 = <&keysn_19>;
+               unifykey-index-20 = <&keysn_20>;
+               unifykey-index-21 = <&keysn_21>;
+               unifykey-index-22 = <&keysn_22>;
+               unifykey-index-23 = <&keysn_23>;
+
+               keysn_0: key_0{
+                       key-name = "usid";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_1:key_1{
+                       key-name = "mac";
+                       key-device  = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_2:key_2{
+                       key-name = "hdcp";
+                       key-device = "secure";
+                       key-type  = "sha1";
+                       key-permit = "read","write","del";
+               };
+               keysn_3:key_3{
+                       key-name = "secure_boot_set";
+                       key-device = "efuse";
+                       key-permit = "write";
+               };
+               keysn_4:key_4{
+                       key-name = "mac_bt";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+                       key-type  = "mac";
+               };
+               keysn_5:key_5{
+                       key-name = "mac_wifi";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+                       key-type  = "mac";
+               };
+               keysn_6:key_6{
+                       key-name = "hdcp2_tx";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_7:key_7{
+                       key-name = "hdcp2_rx";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_8:key_8{
+                       key-name = "widevinekeybox";
+                       key-device = "secure";
+                       key-type = "sha1";
+                       key-permit = "read","write","del";
+               };
+               keysn_9:key_9{
+                       key-name = "deviceid";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_10:key_10{
+                       key-name = "hdcp22_fw_private";
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_11:key_11{
+                       key-name = "hdcp22_rx_private";
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_12:key_12{
+                       key-name = "hdcp22_rx_fw";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_13:key_13{
+                       key-name = "hdcp14_rx";
+                       key-device = "normal";
+                       key-type  = "sha1";
+                       key-permit = "read","write","del";
+               };
+               keysn_14:key_14{
+                       key-name = "prpubkeybox";// PlayReady
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_15:key_15{
+                       key-name = "prprivkeybox";// PlayReady
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_16:key_16{
+                       key-name = "lcd";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_17:key_17{
+                       key-name = "lcd_extern";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_18:key_18{
+                       key-name = "backlight";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_19:key_19{
+                       key-name = "lcd_tcon";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_20:key_20{
+                       key-name = "attestationkeybox";// attestation key
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+               keysn_21:key_21{
+                       key-name = "hdcp22_rprx_fw";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_22:key_22{
+                       key-name = "hdcp22_rprp_fw";
+                       key-device = "normal";
+                       key-permit = "read","write","del";
+               };
+               keysn_23:key_23{
+                       key-name = "hdcp22_rp_private";
+                       key-device = "secure";
+                       key-permit = "read","write","del";
+               };
+       }; /* End unifykey */
+
+       amlvideo2_0 {
+               compatible = "amlogic, amlvideo2";
+               dev_name = "amlvideo2";
+               status = "okay";
+               amlvideo2_id = <0>;
+               cma_mode = <1>;
+       };
+
+       amlvideo2_1 {
+               compatible = "amlogic, amlvideo2";
+               dev_name = "amlvideo2";
+               status = "okay";
+               amlvideo2_id = <1>;
+               cma_mode = <1>;
+       };
+
+       hdmirx {
+               compatible = "amlogic, hdmirx_tm2";
+               #address-cells=<1>;
+               #size-cells=<1>;
+               memory-region = <&hdmirx_emp_cma_reserved>;
+               status = "okay";
+               pinctrl-names = "hdmirx_pins";
+               pinctrl-0 = <&hdmirx_a_mux &hdmirx_b_mux
+                       &hdmirx_c_mux>;
+               repeat = <0>;
+               interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&clkc CLKID_HDMIRX_MODET_COMP>,
+                          <&clkc CLKID_HDMIRX_CFG_COMP>,
+                          <&clkc CLKID_HDMIRX_ACR_COMP>,
+                          <&clkc CLKID_HDMIRX_METER_COMP>,
+                          <&clkc CLKID_HDMIRX_AXI_COMP>,
+                          <&xtal>,
+                          <&clkc CLKID_FCLK_DIV5>,
+                          <&clkc CLKID_FCLK_DIV7>,
+                          <&clkc CLKID_HDCP22_SKP_COMP>,
+                          <&clkc CLKID_HDCP22_ESM_COMP>;
+               //         <&clkc CLK_AUD_PLL2FS>,
+               //         <&clkc CLK_AUD_PLL4FS>,
+               //         <&clkc CLK_AUD_OUT>;
+               clock-names = "hdmirx_modet_clk",
+                       "hdmirx_cfg_clk",
+                               "hdmirx_acr_ref_clk",
+                               "cts_hdmirx_meter_clk",
+                               "cts_hdmi_axi_clk",
+                               "xtal",
+                               "fclk_div5",
+                               "fclk_div7",
+                               "hdcp_rx22_skp",
+                               "hdcp_rx22_esm";
+               //              "hdmirx_aud_pll2fs",
+               //              "hdmirx_aud_pll4f",
+               //              "clk_aud_out";
+               hdmirx_id = <0>;
+               en_4k_2_2k = <0>;
+               hpd_low_cec_off = <1>;
+               /* bit4: enable feature, bit3~0: port number */
+               disable_port = <0x0>;
+               /* MAP_ADDR_MODULE_CBUS */
+               /* MAP_ADDR_MODULE_HIU */
+               /* MAP_ADDR_MODULE_HDMIRX_CAPB3 */
+               /* MAP_ADDR_MODULE_SEC_AHB */
+               /* MAP_ADDR_MODULE_SEC_AHB2 */
+               /* MAP_ADDR_MODULE_APB4 */
+               /* MAP_ADDR_MODULE_TOP */
+               reg = < 0x0 0x0 0x0 0x0
+                       0x0 0xff63C000 0x0 0x2000
+                       0x0 0xffe0d000 0x0 0x2000
+                       0x0 0x0 0x0 0x0
+                       0x0 0x0 0x0 0x0
+                       0x0 0x0 0x0 0x0
+                       0x0 0xff610000 0x0 0xa000>;
+       };
+
+       amhdmitx: amhdmitx {
+               compatible = "amlogic, amhdmitx";
+               dev_name = "amhdmitx";
+               status = "okay";
+               repeater_tx = <0x0>;
+       };
+
+       aocec: aocec {
+               compatible = "amlogic, aocec-tm2";
+               /*device_name = "aocec";*/
+               status = "okay";
+               vendor_name = "Amlogic"; /* Max Chars: 8         */
+               /* Refer to the following URL at:
+                * http://standards.ieee.org/develop/regauth/oui/oui.txt
+                */
+               vendor_id = <0x000000>;
+               product_desc = "TM2"; /* Max Chars: 16    */
+               cec_osd_string = "AML_TV"; /* Max Chars: 14    */
+               port_num = <4>;
+               ee_cec;
+               /*cec_sel = <2>;*/
+               output = <1>;   /*output port number*/
+               arc_port_mask = <0x2>;
+               interrupts = <0 203 1
+                                       0 199 1>;
+               interrupt-names = "hdmi_aocecb","hdmi_aocec";
+               pinctrl-names = "default","hdmitx_aocecb","cec_pin_sleep";
+               pinctrl-0=<&aoceca_mux>;
+               pinctrl-1=<&aocecb_mux>;
+               pinctrl-2=<&aoceca_mux>;
+               reg = <0x0 0xFF80023c 0x0 0x4
+                          0x0 0xFF800000 0x0 0x400>;
+               reg-names = "ao_exit","ao";
+       };
+
+       p_tsensor: p_tsensor@ff634800 {
+               compatible = "amlogic, r1p1-tsensor";
+               status = "okay";
+               reg = <0x0 0xff634800 0x0 0x50>,
+                       <0x0 0xff800268 0x0 0x4>;
+               cal_type = <0x1>;
+               cal_a = <324>;
+               cal_b = <424>;
+               cal_c = <3159>;
+               cal_d = <9411>;
+               rtemp = <115000>;
+               interrupts = <0 35 0>;
+               clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+               clock-names = "ts_comp";
+               #thermal-sensor-cells = <1>;
+       };
+
+       d_tsensor: d_tsensor@ff634c00 {
+               compatible = "amlogic, r1p1-tsensor";
+               status = "okay";
+               reg = <0x0 0xff634c00 0x0 0x50>,
+                       <0x0 0xff800230 0x0 0x4>;
+               cal_type = <0x1>;
+               cal_a = <324>;
+               cal_b = <424>;
+               cal_c = <3159>;
+               cal_d = <9411>;
+               rtemp = <115000>;
+               interrupts = <0 36 0>;
+               clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+               clock-names = "ts_comp";
+               #thermal-sensor-cells = <1>;
+       };
+
+       s_tsensor: s_tsensor@ff635000 {
+               compatible = "amlogic, r1p1-tsensor";
+               status = "okay";
+               reg = <0x0 0xff635000 0x0 0x50>,
+                       <0x0 0xff80026c 0x0 0x4>;
+               cal_type = <0x1>;
+               cal_a = <324>;
+               cal_b = <424>;
+               cal_c = <3159>;
+               cal_d = <9411>;
+               rtemp = <115000>;
+               interrupts = <0 38 0>;
+               clocks = <&clkc CLKID_TS_CLK_COMP>; /* CLKID_TS_COMP>;*/
+               clock-names = "ts_comp";
+               #thermal-sensor-cells = <1>;
+       };
+
+       meson_cooldev: meson-cooldev@0 {
+               status = "okay";
+               compatible = "amlogic, meson-cooldev";
+               cooling_devices {
+                       cpufreq_cool_cluster0 {
+                               min_state = <1000000>;
+                               dyn_coeff = <140>;
+                               gpu_pp = <2>;
+                               cluster_id = <0>;
+                               node_name = "cpufreq_cool0";
+                               device_type = "cpufreq";
+                       };
+                       cpucore_cool_cluster0 {
+                               min_state = <1>;
+                               dyn_coeff = <0>;
+                               gpu_pp = <2>;
+                               cluster_id = <0>;
+                               node_name = "cpucore_cool0";
+                               device_type = "cpucore";
+                       };
+                       gpufreq_cool {
+                               min_state = <400>;
+                               dyn_coeff = <160>;
+                               gpu_pp = <2>;
+                               cluster_id = <0>;
+                               node_name = "gpufreq_cool0";
+                               device_type = "gpufreq";
+                       };
+                       gpucore_cool {
+                               min_state = <1>;
+                               dyn_coeff = <0>;
+                               gpu_pp = <2>;
+                               cluster_id = <0>;
+                               node_name = "gpucore_cool0";
+                               device_type = "gpucore";
+                       };
+               };
+               cpufreq_cool0:cpufreq_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+               cpucore_cool0:cpucore_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+               gpufreq_cool0:gpufreq_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+               gpucore_cool0:gpucore_cool0 {
+                       #cooling-cells = <2>; /* min followed by max */
+               };
+       };/*meson cooling devices end*/
+
+       thermal-zones {
+               pll_thermal: pll_thermal {
+                       polling-delay = <1000>;
+                       polling-delay-passive = <100>;
+                       sustainable-power = <1230>;
+                       thermal-sensors = <&p_tsensor 0>;
+                       trips {
+                               pswitch_on: trip-point@0 {
+                                       temperature = <60000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               pcontrol: trip-point@1 {
+                                       temperature = <75000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               phot: trip-point@2 {
+                                       temperature = <85000>;
+                                       hysteresis = <5000>;
+                                       type = "hot";
+                               };
+                               pcritical: trip-point@3 {
+                                       temperature = <110000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+                       cooling-maps {
+                               cpufreq_cooling_map {
+                                       trip = <&pcontrol>;
+                                       cooling-device = <&cpufreq_cool0 0 11>;
+                                       contribution = <1024>;
+                               };
+                               cpucore_cooling_map {
+                                       trip = <&pcontrol>;
+                                       cooling-device = <&cpucore_cool0 0 4>;
+                                       contribution = <1024>;
+                               };
+                               gpufreq_cooling_map {
+                                       trip = <&pcontrol>;
+                                       cooling-device = <&gpufreq_cool0 0 4>;
+                                       contribution = <1024>;
+                               };
+                       };
+               };
+               ddr_thermal: ddr_thermal {
+                       polling-delay = <2000>;
+                       polling-delay-passive = <1000>;
+                       sustainable-power = <1230>;
+                       thermal-sensors = <&d_tsensor 1>;
+                       trips {
+                               dswitch_on: trip-point@0 {
+                                       temperature = <60000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               dcontrol: trip-point@1 {
+                                       temperature = <75000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               dhot: trip-point@2 {
+                                       temperature = <85000>;
+                                       hysteresis = <5000>;
+                                       type = "hot";
+                               };
+                               dcritical: trip-point@3 {
+                                       temperature = <110000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+               sar_thermal: sar_thermal {
+                       polling-delay = <2000>;
+                       polling-delay-passive = <1000>;
+                       sustainable-power = <1230>;
+                       thermal-sensors = <&s_tsensor 2>;
+                       trips {
+                               sswitch_on: trip-point@0 {
+                                       temperature = <60000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               scontrol: trip-point@1 {
+                                       temperature = <75000>;
+                                       hysteresis = <5000>;
+                                       type = "passive";
+                               };
+                               shot: trip-point@2 {
+                                       temperature = <85000>;
+                                       hysteresis = <5000>;
+                                       type = "hot";
+                               };
+                               scritical: trip-point@3 {
+                                       temperature = <110000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+       }; /*thermal zone end*/
+
+       cpu_opp_table0: cpu_opp_table0 {
+               compatible = "operating-points-v2";
+               opp-shared;
+
+               opp00 {
+                       opp-hz = /bits/ 64 <100000000>;
+                       opp-microvolt = <730000>;
+               };
+               opp01 {
+                       opp-hz = /bits/ 64 <250000000>;
+                       opp-microvolt = <730000>;
+               };
+               opp02 {
+                       opp-hz = /bits/ 64 <500000000>;
+                       opp-microvolt = <730000>;
+               };
+               opp03 {
+                       opp-hz = /bits/ 64 <667000000>;
+                       opp-microvolt = <750000>;
+               };
+               opp04 {
+                       opp-hz = /bits/ 64 <1000000000>;
+                       opp-microvolt = <770000>;
+               };
+               opp05 {
+                       opp-hz = /bits/ 64 <1200000000>;
+                       opp-microvolt = <780000>;
+               };
+               opp06 {
+                       opp-hz = /bits/ 64 <1404000000>;
+                       opp-microvolt = <790000>;
+               };
+               opp07 {
+                       opp-hz = /bits/ 64 <1500000000>;
+                       opp-microvolt = <800000>;
+               };
+               opp08 {
+                       opp-hz = /bits/ 64 <1608000000>;
+                       opp-microvolt = <810000>;
+               };
+               opp09 {
+                       opp-hz = /bits/ 64 <1704000000>;
+                       opp-microvolt = <850000>;
+               };
+               opp10 {
+                       opp-hz = /bits/ 64 <1800000000>;
+                       opp-microvolt = <900000>;
+               };
+               opp11 {
+                       opp-hz = /bits/ 64 <1908000000>;
+                       opp-microvolt = <950000>;
+               };
+       };
+
+       cpufreq-meson {
+               compatible = "amlogic, cpufreq-meson";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm_ao_d_pins3>;
+               status = "okay";
+       };
+
+       tuner: tuner {
+               compatible = "amlogic, tuner";
+               status = "okay";
+               tuner_cur = <0>; /* default use tuner */
+               tuner_num = <1>; /* tuner number, multi tuner support */
+               tuner_name_0 = "si2151_tuner";
+               tuner_i2c_adap_0 = <&i2c0>;
+               tuner_i2c_addr_0 = <0x60>;
+               /* tuner_xtal_0 = <0>; */ /* unuse for si2151 */
+               /* tuner_xtal_mode_0 = <0>; */
+               /* tuner_xtal_cap_0 = <0>; */
+       };
+
+       atv-demod {
+               compatible = "amlogic, atv-demod";
+               status = "okay";
+               tuner = <&tuner>;
+               btsc_sap_mode = <1>;
+               interrupts = <0 236 1>;
+               /* pinctrl-names="atvdemod_agc_pins"; */
+               /* pinctrl-0=<&atvdemod_agc_pins>; */
+               reg = <0x0 0xff656000 0x0 0x2000 /* demod reg */
+                               0x0 0xff63c000 0x0 0x2000 /* hiu reg */
+                               0x0 0xff634000 0x0 0x2000 /* periphs reg */
+                               0x0 0xff64a000 0x0 0x2000>; /* audio reg */
+               reg_23cf = <0x88188832>;
+               /*default:0x88188832;r840 on haier:0x48188832*/
+       };
+
+       bt-dev{
+               compatible = "amlogic, bt-dev";
+               status = "okay";
+               gpio_reset = <&gpio       GPIOC_13       GPIO_ACTIVE_HIGH>;
+       };
+
+       wifi{
+               compatible = "amlogic, aml_wifi";
+               status = "okay";
+               interrupt_pin = <&gpio       GPIOC_12       GPIO_ACTIVE_HIGH>;
+               irq_trigger_type = "GPIO_IRQ_LOW";
+               dhd_static_buf;    //dhd_static_buf support
+               power_on_pin = <&gpio       GPIOC_11       GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pwm_b_pins1>;
+               pwm_config = <&wifi_pwm_conf>;
+       };
+
+       wifi_pwm_conf:wifi_pwm_conf{
+               pwm_channel1_conf {
+                       pwms = <&pwm_ab MESON_PWM_1 30541 0>;
+                       duty-cycle = <15270>;
+                       times = <8>;
+               };
+               pwm_channel2_conf {
+                       pwms = <&pwm_ab MESON_PWM_3 30500 0>;
+                       duty-cycle = <15250>;
+                       times = <12>;
+               };
+       };
+
+       sd_emmc_b: sdio@ffe05000 {
+               status = "okay";
+               compatible = "amlogic, meson-mmc-tm2";
+               reg = <0x0 0xffe05000 0x0 0x800>;
+               interrupts = <0 190 4>;
+
+               pinctrl-names = "sdio_all_pins",
+                       "sdio_clk_cmd_pins";
+               pinctrl-0 = <&sdio_all_pins>;
+               pinctrl-1 = <&sdio_clk_cmd_pins>;
+
+               clocks = <&clkc CLKID_SD_EMMC_B>,
+                       <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+                       <&clkc CLKID_FCLK_DIV2>,
+                       <&clkc CLKID_FCLK_DIV5>,
+                       <&xtal>;
+               clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+
+               bus-width = <4>;
+               cap-sd-highspeed;
+               cap-mmc-highspeed;
+               max-frequency = <100000000>;
+               disable-wp;
+               sdio {
+                       pinname = "sdio";
+                       ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
+                       caps = "MMC_CAP_4_BIT_DATA",
+                               "MMC_CAP_MMC_HIGHSPEED",
+                               "MMC_CAP_SD_HIGHSPEED",
+                               "MMC_CAP_NONREMOVABLE", /**ptm debug */
+                                "MMC_CAP_UHS_SDR12",
+                                "MMC_CAP_UHS_SDR25",
+                                "MMC_CAP_UHS_SDR50",
+                                "MMC_CAP_UHS_SDR104",
+                                "MMC_PM_KEEP_POWER",
+                                "MMC_CAP_SDIO_IRQ";
+                       f_min = <400000>;
+                       f_max = <200000000>;
+                       max_req_size = <0x20000>; /**128KB*/
+                       card_type = <3>;
+                       /* 3:sdio device(ie:sdio-wifi),
+                        * 4:SD combo (IO+mem) card
+                        */
+               };
+       };
+/*     sd_emmc_b: sd@ffe05000 {
+ *             status = "okay";
+ *             compatible = "amlogic, meson-mmc-tm2";
+ *             reg = <0xffe05000 0x800>;
+ *             interrupts = <0 190 1>;
+ *
+ *             pinctrl-names = "sd_all_pins",
+ *                     "sd_clk_cmd_pins",
+ *                     "sd_1bit_pins";
+ *             pinctrl-0 = <&sd_all_pins>;
+ *             pinctrl-1 = <&sd_clk_cmd_pins>;
+ *             pinctrl-2 = <&sd_1bit_pins>;
+ *
+ *             clocks = <&clkc CLKID_SD_EMMC_B>,
+ *                     <&clkc CLKID_SD_EMMC_B_P0_COMP>,
+ *                     <&clkc CLKID_FCLK_DIV2>,
+ *                     <&clkc CLKID_FCLK_DIV5>,
+ *                     <&xtal>;
+ *             clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
+ *
+ *             bus-width = <4>;
+ *             cap-sd-highspeed;
+ *             cap-mmc-highspeed;
+ *             max-frequency = <100000000>;
+ *             disable-wp;
+ *             sd {
+ *                     pinname = "sd";
+ *                     ocr_avail = <0x200080>;
+ *                     caps = "MMC_CAP_4_BIT_DATA",
+ *                             "MMC_CAP_MMC_HIGHSPEED",
+ *                             "MMC_CAP_SD_HIGHSPEED";
+ *                     f_min = <400000>;
+ *                     f_max = <200000000>;
+ *                     max_req_size = <0x20000>;
+ *                     no_sduart = <1>;
+ *                     gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
+ *                     jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
+ *                     gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
+ *                     card_type = <5>;
+ *             };
+ *     };
+ */
+
+}; /* end of / */
+
+&i2c0 {
+       status = "okay";
+       clock-frequency = <300000>;
+       pinctrl-names="default";
+       pinctrl-0=<&i2c0_dv_pins>;
+};
+
+&audiobus {
+       tdma:tdm@0 {
+               compatible = "amlogic, tm2-snd-tdma";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0>;
+               dai-tdm-lane-slot-mask-out = <1 1 1 1>;
+               dai-tdm-clk-sel = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_A
+                               &clkc CLKID_MPLL0>;
+               clock-names = "mclk", "clk_srcpll";
+
+               pinctrl-names = "tdm_pins";
+               pinctrl-0 = <&tdma_mclk &tdmout_a>;
+       };
+
+       tdmb:tdm@1 {
+               compatible = "amlogic, tm2-snd-tdmb";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+               dai-tdm-lane-slot-mask-out = <0 1 0 0>;
+               dai-tdm-clk-sel = <1>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+                               &clkc CLKID_MPLL1>;
+               clock-names = "mclk", "clk_srcpll";
+
+               status = "okay";
+       };
+
+       tdmc:tdm@2 {
+               compatible = "amlogic, tm2-snd-tdmc";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-slot-mask-in = <1 0 0 0>;
+               dai-tdm-lane-slot-mask-out = <1 0 0 0>;
+               dai-tdm-clk-sel = <2>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_C
+                               &clkc CLKID_MPLL2>;
+               clock-names = "mclk", "clk_srcpll";
+
+               pinctrl-names = "tdm_pins";
+               pinctrl-0 = <&tdmout_c &tdmin_c>;
+
+               status = "okay";
+       };
+
+       tdmlb:tdm@3 {
+               compatible = "amlogic, tm2-snd-tdmlb";
+               #sound-dai-cells = <0>;
+
+               dai-tdm-lane-lb-slot-mask-in = <1 0 0 0>;
+               dai-tdm-clk-sel = <1>;
+
+               clocks = <&clkaudio CLKID_AUDIO_MCLK_B
+                               &clkc CLKID_MPLL1>;
+               clock-names = "mclk", "clk_srcpll";
+
+               /*
+                * select tdmin_lb src;
+                * AXG
+                *  0: TDMOUTA
+                *  1: TDMOUTB
+                *  2: TDMOUTC
+                *  3: PAD_TDMINA
+                *  4: PAD_TDMINB
+                *  5: PAD_TDMINC
+                *
+                * G12A/G12B
+                *  0: TDMOUTA
+                *  1: TDMOUTB
+                *  2: TDMOUTC
+                *  3: PAD_TDMINA_DIN*
+                *  4: PAD_TDMINB_DIN*
+                *  5: PAD_TDMINC_DIN*
+                *  6: PAD_TDMINA_D*, oe pin
+                *  7: PAD_TDMINB_D*, oe pin
+                *
+                * TL1/SM1
+                *  0: TDMOUTA
+                *  1: TDMOUTB
+                *  2: TDMOUTC
+                *  3: PAD_TDMINA_DIN*
+                *  4: PAD_TDMINB_DIN*
+                *  5: PAD_TDMINC_DIN*
+                *  6: PAD_TDMINA_D*
+                *  7: PAD_TDMINB_D*
+                *  8: PAD_TDMINC_D*
+                *  9: HDMIRX_I2S
+                *  10: ACODEC_ADC
+                */
+               lb-src-sel = <1>;
+
+               status = "disabled";
+       };
+
+       pdm:pdm {
+               compatible = "amlogic, tm2-snd-pdm";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+                       &clkc CLKID_FCLK_DIV3
+                       &clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_PDMIN0
+                       &clkaudio CLKID_AUDIO_PDMIN1>;
+               clock-names = "gate",
+                       "sysclk_srcpll",
+                       "dclk_srcpll",
+                       "pdm_dclk",
+                       "pdm_sysclk";
+
+               pinctrl-names = "pdm_pins";
+               pinctrl-0 = <&pdmin>;
+
+               /* mode 0~4, defalut:1 */
+               filter_mode = <1>;
+
+               status = "okay";
+       };
+
+       spdifa:spdif@0 {
+               compatible = "amlogic, tm2-snd-spdif-a";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkc CLKID_MPLL1
+                               &clkc CLKID_FCLK_DIV4
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFIN
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
+                               &clkaudio CLKID_AUDIO_SPDIFIN
+                               &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
+               clock-names = "sysclk", "fixed_clk", "gate_spdifin",
+                               "gate_spdifout", "clk_spdifin", "clk_spdifout";
+
+               interrupts =
+                               <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_spdifin";
+
+               pinctrl-names = "spdif_pins",
+                               "spdif_pins_mute";
+               pinctrl-0 = <&spdifin_a>;
+               //pinctrl-1 = <&spdifout_a_mute>;
+
+               /*
+                * whether do asrc for pcm and resample a or b
+                * if raw data, asrc is disabled automatically
+                * 0: "Disable",
+                * 1: "Enable:32K",
+                * 2: "Enable:44K",
+                * 3: "Enable:48K",
+                * 4: "Enable:88K",
+                * 5: "Enable:96K",
+                * 6: "Enable:176K",
+                * 7: "Enable:192K",
+                */
+               asrc_id = <0>;
+               auto_asrc = <3>;
+
+               /*spdif clk tuning enable*/
+               clk_tuning_enable = <1>;
+               status = "okay";
+       };
+
+       spdifb:spdif@1 {
+               compatible = "amlogic, tm2-snd-spdif-b";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
+                               &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
+                               &clkaudio CLKID_AUDIO_SPDIFOUT_B>;
+               clock-names = "sysclk",
+                               "gate_spdifout", "clk_spdifout";
+
+               status = "okay";
+       };
+
+       extn:extn {
+               compatible = "amlogic, snd-extn";
+               #sound-dai-cells = <0>;
+
+               interrupts =
+                               <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_frhdmirx";
+
+               status = "okay";
+       };
+
+       aed:effect {
+               compatible = "amlogic, snd-effect-v3";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_EQDRC>;
+               clock-names = "gate", "srcpll", "eqdrc";
+
+               /*
+                * 0:tdmout_a
+                * 1:tdmout_b
+                * 2:tdmout_c
+                * 3:spdifout
+                * 4:spdifout_b
+                */
+               eqdrc_module = <0>;
+               /* max 0xf, each bit for one lane, usually one lane */
+               lane_mask = <0x1>;
+               /* max 0xff, each bit for one channel */
+               channel_mask = <0xff>;
+
+               status = "okay";
+       };
+
+       asrca: resample@0 {
+               compatible = "amlogic, tl1-resample-a";
+               clocks = <&clkc CLKID_MPLL0
+                               &clkaudio CLKID_AUDIO_MCLK_A
+                               &clkaudio CLKID_AUDIO_RESAMPLE_A>;
+               clock-names = "resample_pll", "resample_src", "resample_clk";
+               /*same with toddr_src
+                *      TDMIN_A, 0
+                *      TDMIN_B, 1
+                *      TDMIN_C, 2
+                *      SPDIFIN, 3
+                *      PDMIN,  4
+                *      NONE,
+                *      TDMIN_LB, 6
+                *      LOOPBACK, 7
+                */
+               resample_module = <3>;
+
+               status = "disabled";
+       };
+
+       asrcb: resample@1 {
+               compatible = "amlogic, tl1-resample-b";
+
+               clocks = <&clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_MCLK_F
+                       &clkaudio CLKID_AUDIO_RESAMPLE_B>;
+               clock-names = "resample_pll", "resample_src", "resample_clk";
+
+               /*same with toddr_src
+                *      TDMIN_A, 0
+                *      TDMIN_B, 1
+                *      TDMIN_C, 2
+                *      SPDIFIN, 3
+                *      PDMIN,  4
+                *      NONE,
+                *      TDMIN_LB, 6
+                *      LOOPBACK, 7
+                */
+               resample_module = <3>;
+
+               status = "disabled";
+       };
+
+       vad:vad {
+               compatible = "amlogic, snd-vad";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD
+                       &clkc CLKID_FCLK_DIV5
+                       &clkaudio CLKID_AUDIO_VAD>;
+               clock-names = "gate", "pll", "clk";
+
+               interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING
+                               GIC_SPI 47 IRQ_TYPE_EDGE_RISING>;
+               interrupt-names = "irq_wakeup", "irq_frame_sync";
+
+               /*
+                * Data src sel:
+                * 0: tdmin_a;
+                * 1: tdmin_b;
+                * 2: tdmin_c;
+                * 3: spdifin;
+                * 4: pdmin;
+                * 5: loopback_b;
+                * 6: tdmin_lb;
+                * 7: loopback_a;
+                */
+               src = <4>;
+
+               /*
+                * deal with hot word in user space or kernel space
+                * 0: in user space
+                * 1: in kernel space
+                */
+               level = <1>;
+
+               status = "okay";
+       };
+
+       loopbacka:loopback@0 {
+               compatible = "amlogic, tm2-loopbacka";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+                       &clkc CLKID_FCLK_DIV3
+                       &clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_PDMIN0
+                       &clkaudio CLKID_AUDIO_PDMIN1
+                       &clkc CLKID_MPLL0
+                       &clkaudio CLKID_AUDIO_MCLK_A>;
+               clock-names = "pdm_gate",
+                       "pdm_sysclk_srcpll",
+                       "pdm_dclk_srcpll",
+                       "pdm_dclk",
+                       "pdm_sysclk",
+                       "tdminlb_mpll",
+                       "tdminlb_mclk";
+
+               /* datain src
+                * 0: tdmin_a;
+                * 1: tdmin_b;
+                * 2: tdmin_c;
+                * 3: spdifin;
+                * 4: pdmin;
+                */
+               datain_src = <4>;
+               datain_chnum = <4>;
+               datain_chmask = <0xf>;
+               /* config which data pin for loopback */
+               datain-lane-mask-in = <1 0 1 0>;
+
+               /* calc mclk for datalb */
+               mclk-fs = <256>;
+
+               /* tdmin_lb src
+                * 0: tdmoutA
+                * 1: tdmoutB
+                * 2: tdmoutC
+                * 3: PAD_TDMINA_DIN*, refer to core pinmux
+                * 4: PAD_TDMINB_DIN*, refer to core pinmux
+                * 5: PAD_TDMINC_DIN*, refer to core pinmux
+                * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+                * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+                */
+               /* if tdmin_lb >= 3, use external loopback */
+               datalb_src = <0>;
+               datalb_chnum = <2>;
+               datalb_chmask = <0x3>;
+               /* config which data pin as loopback */
+               datalb-lane-mask-in = <1 0 0 0>;
+
+               status = "okay";
+       };
+
+       loopbackb:loopback@1 {
+               compatible = "amlogic, tm2-loopbackb";
+               #sound-dai-cells = <0>;
+
+               clocks = <&clkaudio CLKID_AUDIO_GATE_PDM
+                       &clkc CLKID_FCLK_DIV3
+                       &clkc CLKID_MPLL3
+                       &clkaudio CLKID_AUDIO_PDMIN0
+                       &clkaudio CLKID_AUDIO_PDMIN1
+                       &clkc CLKID_MPLL0
+                       &clkaudio CLKID_AUDIO_MCLK_A>;
+               clock-names = "pdm_gate",
+                       "pdm_sysclk_srcpll",
+                       "pdm_dclk_srcpll",
+                       "pdm_dclk",
+                       "pdm_sysclk",
+                       "tdminlb_mpll",
+                       "tdminlb_mclk";
+
+               /* calc mclk for datain_lb */
+               mclk-fs = <256>;
+
+               /* datain src
+                * 0: tdmin_a;
+                * 1: tdmin_b;
+                * 2: tdmin_c;
+                * 3: spdifin;
+                * 4: pdmin;
+                */
+               datain_src = <4>;
+               datain_chnum = <4>;
+               datain_chmask = <0xf>;
+               /* config which data pin for loopback */
+               datain-lane-mask-in = <1 0 1 0>;
+
+               /* tdmin_lb src
+                * 0: tdmoutA
+                * 1: tdmoutB
+                * 2: tdmoutC
+                * 3: PAD_TDMINA_DIN*, refer to core pinmux
+                * 4: PAD_TDMINB_DIN*, refer to core pinmux
+                * 5: PAD_TDMINC_DIN*, refer to core pinmux
+                * 6: PAD_TDMINA_D*, oe, refer to core pinmux
+                * 7: PAD_TDMINB_D*, oe, refer to core pinmux
+                */
+               /* if tdmin_lb >= 3, use external loopback */
+               datalb_src = <1>;
+               datalb_chnum = <2>;
+               datalb_chmask = <0x3>;
+               /* config which data pin as loopback */
+               datalb-lane-mask-in = <1 0 0 0>;
+
+               status = "disabled";
+       };
+}; /* end of audiobus */
+
+&earc {
+       status = "okay";
+};
+
+&pinctrl_periphs {
+       /* audio pin mux */
+
+       tdma_mclk: tdma_mclk {
+               mux { /* GPIOH_4 */
+                       groups = "mclk0_h";
+                       function = "mclk0";
+               };
+       };
+
+       tdmout_a: tdmout_a {
+               mux { /* GPIOH_5, GPIOH_6, GPIOH_7, GPIOH_8, GPIOH_9, GPIOH_10*/
+                       groups = "tdma_fs_h",
+                               "tdma_sclk_h",
+                               "tdma_dout0_h",
+                               "tdma_dout1_h",
+                               "tdma_dout2_h",
+                               "tdma_dout3_h";
+                       function = "tdma_out";
+                       bias-pull-down;
+               };
+       };
+
+       tdmin_a: tdmin_a {
+               mux { /* GPIOH_11, GPIOH_12 */
+                       groups = "tdma_din0_h",
+                           "tdma_din1_h";
+                       function = "tdma_in";
+               };
+       };
+
+       tdmout_c: tdmout_c {
+               mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
+                       groups = "tdmc_sclk",
+                               "tdmc_fs",
+                               "tdmc_dout0";
+                       function = "tdmc_out";
+               };
+       };
+
+       tdmin_c: tdmin_c {
+               mux { /* GPIODV_10 */
+                       groups = "tdmc_din1";
+                       function = "tdmc_in";
+               };
+       };
+
+       spdifin_a: spdifin_a {
+               mux { /* GPIODV_5 */
+                       groups = "spdif_in";
+                       function = "spdif_in";
+               };
+       };
+
+       spdifout_a: spdifout_a {
+               mux { /* GPIODV_4 */
+                       groups = "spdif_out_dv4";
+                       function = "spdif_out";
+               };
+       };
+
+       spdifout_a_mute: spdifout_a_mute {
+               mux { /* GPIODV_4 */
+                       groups = "GPIODV_4";
+                       function = "gpio_periphs";
+               };
+       };
+
+       pdmin: pdmin {
+               mux { /* GPIOZ_7, GPIOZ_8, pdm_din2_z4 */
+                       groups = "pdm_dclk_z",
+                               "pdm_din0_z",
+                               "pdm_din2_z4";
+                       function = "pdm";
+               };
+       };
+
+       /*backlight*/
+       bl_pwm_vs_on_pins:bl_pwm_vs_on_pin {
+               mux {
+                       groups = "pwm_vs_z5";
+                       function = "pwm_vs";
+               };
+       };
+       bl_pwm_off_pins:bl_pwm_off_pin {
+               mux {
+                       groups = "GPIOZ_5";
+                       function = "gpio_periphs";
+                       output-low;
+               };
+       };
+       bl_pwm_combo_0_vs_on_pins:bl_pwm_combo_0_vs_on_pin {
+               mux {
+                       groups = "pwm_vs_z5";
+                       function = "pwm_vs";
+               };
+       };
+       bl_pwm_combo_1_vs_on_pins:bl_pwm_combo_1_vs_on_pin {
+               mux {
+                       groups = "pwm_vs_z6";
+                       function = "pwm_vs";
+               };
+       };
+       bl_pwm_combo_off_pins:bl_pwm_combo_off_pin {
+               mux {
+                       groups = "GPIOZ_5",
+                               "GPIOZ_6";
+                       function = "gpio_periphs";
+                       output-low;
+               };
+       };
+
+}; /* end of pinctrl_periphs */
+
+&audio_data{
+       status = "okay";
+};
+
+&i2c2 {
+       status = "okay";
+       pinctrl-names="default";
+       pinctrl-0=<&i2c2_h_pins>;
+       clock-frequency = <400000>;
+
+       /*****************************************************************/
+       tas5782m_pu1: tas5782m_pu1@48 {
+               compatible = "ti, tas5782m";
+               #sound-dai-cells = <0>;
+               reg = <0x48>;
+               reset_pin = <&gpio GPIOH_14 GPIO_ACTIVE_LOW>;
+               status = "okay";
+               codec_name = "tas5782m";
+               work_mode = <0>;  /*0: i2s 1:tdm*/
+               chip_offset = <1>; /*chip_N [1,2....]*/
+       };
+
+       tas5782m_pu2: tas5782m_pu2@49 {
+               compatible = "ti, tas5782m";
+               #sound-dai-cells = <0>;
+               reg = <0x49>;
+               status = "okay";
+               codec_name = "tas5782m";
+               work_mode = <0>;  /*0: i2s 1:tdm*/
+               chip_offset = <2>; /*chip_N [1,2....]*/
+       };
+
+       tas5782m_pu3: tas5782m_pu3@4a {
+               compatible = "ti, tas5782m";
+               #sound-dai-cells = <0>;
+               reg = <0x4a>;
+               status = "okay";
+               codec_name = "tas5782m";
+               work_mode = <0>;  /*0: i2s 1:tdm*/
+               chip_offset = <3>; /*chip_N [1,2....]*/
+       };
+
+       tas5782m_pu4: tas5782m_pu4@4b {
+               compatible = "ti, tas5782m";
+               #sound-dai-cells = <0>;
+               reg = <0x4b>;
+               status = "okay";
+               codec_name = "tas5782m";
+               work_mode = <0>;  /*0: i2s 1:tdm*/
+               chip_offset = <4>; /*chip_N [1,2....]*/
+       };
+       /*****************************************************************/
+
+       tas5805: tas5805@36 {
+               compatible = "ti,tas5805";
+               #sound-dai-cells = <0>;
+               codec_name = "tas5805";
+               reg = <0x2d>;
+               status = "disable";
+       };
+};
+
+&i2c3 {
+       status = "okay";
+       pinctrl-names="default";
+       pinctrl-0=<&i2c3_h1_pins>;
+       clock-frequency = <400000>;
+
+       ad82584f: ad82584f@60 {
+               compatible = "ESMT, ad82584f";
+               #sound-dai-cells = <0>;
+               reg = <0x30>;
+               status = "okay";
+               reset_pin = <&gpio GPIOH_13 0>;
+               no_mclk;
+       };
+
+       ad82584f1: ad82584f@62 {
+               compatible = "ESMT, ad82584f";
+               #sound-dai-cells = <0>;
+               reg = <0x31>;
+               status = "okay";
+               no_mclk;
+       };
+};
+
+&sd_emmc_c {
+       status = "okay";
+       emmc {
+               caps = "MMC_CAP_8_BIT_DATA",
+                        "MMC_CAP_MMC_HIGHSPEED",
+                        "MMC_CAP_SD_HIGHSPEED",
+                        "MMC_CAP_NONREMOVABLE",
+                        "MMC_CAP_1_8V_DDR",
+                        "MMC_CAP_HW_RESET",
+                        "MMC_CAP_ERASE",
+                        "MMC_CAP_CMD23";
+               caps2 = "MMC_CAP2_HS200","MMC_CAP2_HS400";
+               f_min = <400000>;
+               f_max = <200000000>;
+       };
+};
+
+&spifc {
+       status = "disabled";
+       spi-nor@0 {
+               cs_gpios = <&gpio BOOT_13 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&slc_nand {
+       status = "disabled";
+       plat-names = "bootloader", "nandnormal";
+       plat-num = <2>;
+       plat-part-0 = <&bootloader>;
+       plat-part-1 = <&nandnormal>;
+       bootloader: bootloader{
+               enable_pad = "ce0";
+               busy_pad = "rb0";
+               timming_mode = "mode5";
+               bch_mode = "bch8_1k";
+               t_rea = <20>;
+               t_rhoh = <15>;
+               chip_num = <1>;
+               part_num = <0>;
+               rb_detect = <1>;
+       };
+       nandnormal: nandnormal{
+               enable_pad = "ce0";
+               busy_pad = "rb0";
+               timming_mode = "mode5";
+               bch_mode = "bch8_1k";
+               plane_mode = "twoplane";
+               t_rea = <20>;
+               t_rhoh = <15>;
+               chip_num = <2>;
+               part_num = <3>;
+               partition = <&nand_partitions>;
+               rb_detect = <1>;
+       };
+       nand_partitions:nand_partition{
+               /*
+                * if bl_mode is 1, tpl size was generate by
+                * fip_copies * fip_size which
+                * will not skip bad when calculating
+                * the partition size;
+                *
+                * if bl_mode is 0,
+                * tpl partition must be comment out.
+                */
+               tpl{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x0>;
+               };
+               logo{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x200000>;
+               };
+               recovery{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x1000000>;
+               };
+               boot{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x1000000>;
+               };
+               system{
+                       offset=<0x0 0x0>;
+                       size=<0x0 0x4000000>;
+               };
+               data{
+                       offset=<0xffffffff 0xffffffff>;
+                       size=<0x0 0x0>;
+               };
+       };
+};
+
+&ethmac {
+       status = "okay";
+       //pinctrl-names = "internal_eth_pins";
+       //pinctrl-0 = <&internal_eth_pins>;
+       mc_val = <0x4be04>;
+
+       internal_phy=<1>;
+};
+
+&uart_A {
+       status = "okay";
+};
+
+&dwc3 {
+       status = "okay";
+};
+
+&usb2_phy_v2 {
+       status = "okay";
+       portnum = <3>;
+};
+
+&usb3_phy_v2 {
+       status = "okay";
+       portnum = <0>;
+       portconfig-30 = <0>;
+       portconfig-31 = <0>;
+};
+
+&usb_otg {
+       status = "okay";
+       otg = <0>;
+};
+
+&dwc2_a {
+       status = "okay";
+       /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
+       controller-type = <1>;
+};
+
+&pcie_A {
+       reset-gpio = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
+       status = "disable";
+};
+
+&pcie_B {
+       /* ab311 only pcie a, no pcie b */
+       status = "disable";
+};
+
+&spicc0 {
+       status = "disabled";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spicc0_pins_h>;
+       cs-gpios = <&gpio GPIOH_20 0>;
+};
+
+&meson_fb {
+       status = "okay";
+       display_size_default = <1920 1080 1920 2160 32>;
+       mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>;
+       logo_addr = "0x7f800000";
+       mem_alloc = <0>;
+       pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
+};
+
+&pwm_AO_cd {
+       status = "okay";
+};
+
+&saradc {
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+       clock-frequency = <300000>;
+       pinctrl-names="default";
+       pinctrl-0=<&i2c1_h_pins>;
+
+       lcd_extern_i2c0: lcd_extern_i2c@0 {
+               compatible = "lcd_ext, i2c";
+               dev_name = "i2c_T5800Q";
+               reg = <0x1c>;
+               status = "okay";
+       };
+
+       lcd_extern_i2c1: lcd_extern_i2c@1 {
+               compatible = "lcd_ext, i2c";
+               dev_name = "i2c_ANX6862";
+               reg = <0x20>;
+               status = "okay";
+       };
+
+       lcd_extern_i2c2: lcd_extern_i2c@2 {
+               compatible = "lcd_ext, i2c";
+               dev_name = "i2c_ANX7911";
+               reg = <0x74>;
+               status = "okay";
+       };
+};
+
+&pwm_ab {
+       status = "okay";
+};
+
+&pwm_cd {
+       status = "okay";
+};
+
+&efuse {
+       status = "okay";
+};
+