*
*
*/
-#define RX_VER2 "ver.2018/10/30"
+#define RX_VER2 "ver.2018/11/14"
/*print type*/
#define LOG_EN 0x01
return false;
}
+void rx_afifo_store_all_subpkt(bool all_pkt)
+{
+ static bool flag = true;
+
+ if (all_pkt) {
+ if (log_level & AUDIO_LOG)
+ rx_pr("afifo store all subpkts: %d\n", flag);
+ /* when afifo overflow, try afifo store
+ * configuration alternatively
+ */
+ if (flag)
+ hdmirx_wr_bits_dwc(DWC_AUD_FIFO_CTRL,
+ AFIF_SUBPACKETS, 0);
+ else
+ hdmirx_wr_bits_dwc(DWC_AUD_FIFO_CTRL,
+ AFIF_SUBPACKETS, 1);
+ flag = !flag;
+ } else
+ hdmirx_wr_bits_dwc(DWC_AUD_FIFO_CTRL,
+ AFIF_SUBPACKETS, 1);
+}
+
/*
* hdmirx_audio_fifo_rst - reset afifo
*/
extern void rx_hdcp14_resume(void);
extern void hdmirx_load_firm_reset(int type);
extern unsigned int hdmirx_packet_fifo_rst(void);
+extern void rx_afifo_store_all_subpkt(bool all_pkt);
extern unsigned int hdmirx_audio_fifo_rst(void);
extern void hdmirx_phy_init(void);
extern void hdmirx_hw_config(void);
if (log_level & 0x100)
rx_pr("[irq] OVERFL\n");
rx.irq_flag |= IRQ_AUD_FLAG;
+ /* when afifo overflow in multi-channel case(VG-877),
+ * then store all subpkts into afifo, 8ch in and 8ch out
+ */
+ if (rx.aud_info.auds_layout)
+ rx_afifo_store_all_subpkt(true);
//if (rx.aud_info.real_sr != 0)
//error |= hdmirx_audio_fifo_rst();
}
rx_get_audinfo(&rx.aud_info);
hdmirx_config_audio();
rx_aud_pll_ctl(1);
+ rx_afifo_store_all_subpkt(false);
hdmirx_audio_fifo_rst();
rx.stable_timestamp = rx.timestamp;
rx_pr("Sig ready\n");