ARM: dts: imx6dl-victgo: Add interrupt-counter nodes
authorRobin van der Gracht <robin@protonic.nl>
Mon, 21 Feb 2022 09:53:10 +0000 (10:53 +0100)
committerShawn Guo <shawnguo@kernel.org>
Wed, 6 Apr 2022 02:12:32 +0000 (10:12 +0800)
Interrupt counter is mainlined, now we can add missing counter nodes.

Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6dl-victgo.dts

index d542dda..3d6dc1b 100644 (file)
                };
        };
 
+       counter-0 {
+               compatible = "interrupt-counter";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_counter0>;
+               gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+       };
+
+       counter-1 {
+               compatible = "interrupt-counter";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_counter1>;
+               gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+       };
+
+       counter-2 {
+               compatible = "interrupt-counter";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_counter2>;
+               gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+       };
+
        gpio-keys {
                compatible = "gpio-keys";
                pinctrl-names = "default";
 
 &gpio2 {
        gpio-line-names =
-               "", "", "", "", "", "", "", "",
+               "YACO_WHEEL", "YACO_RADAR", "YACO_PTO", "", "", "", "", "",
                "", "LED_PWM", "", "", "",
                        "", "", "",
                "", "", "", "", "", "", "ISB_IN1", "ON_SWITCH",
                >;
        };
 
+       pinctrl_counter0: counter0grp {
+               fsl,pins = <
+                       MX6QDL_PAD_NANDF_D0__GPIO2_IO00                 0x1b000
+               >;
+       };
+
+       pinctrl_counter1: counter1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_NANDF_D1__GPIO2_IO01                 0x1b000
+               >;
+       };
+
+       pinctrl_counter2: counter2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_NANDF_D2__GPIO2_IO02                 0x1b000
+               >;
+       };
+
        pinctrl_ecspi1: ecspi1grp {
                fsl,pins = <
                        MX6QDL_PAD_EIM_D17__ECSPI1_MISO                 0x100b1