* gas/all/gas.exp: Exclude float.s for crisv32-*-*.
authorHans-Peter Nilsson <hp@axis.com>
Thu, 4 Nov 2004 15:03:06 +0000 (15:03 +0000)
committerHans-Peter Nilsson <hp@axis.com>
Thu, 4 Nov 2004 15:03:06 +0000 (15:03 +0000)
* gas/cris/operand-err-1.s (test.m constant): Remove xfail marker
and update rationale.  Mark "ba [external_symbol]" and "ba [r3]"
as invalid.
* gas/ieee-fp/x930509a.exp: setup_xfail for crisv32-*-*.
* gas/macros/macros.exp: setup_xfail strings for crisv32-*-*.
* gas/cris/abs32-1.s, gas/cris/arch-err-1.s,
gas/cris/arch-err-2.s, gas/cris/arch-err-3.s,
gas/cris/arch-err-4.s, gas/cris/arch-err-5.s,
gas/cris/bound-err-1.s, gas/cris/brokw-3b.s,
gas/cris/march-err-1.s, gas/cris/march-err-2.s,
gas/cris/push-err-1.s, gas/cris/push-err-2.s,
gas/cris/pushpopv32.s, gas/cris/rd-abs32-1.d,
gas/cris/rd-abs32-2.d, gas/cris/rd-arch-1.d, gas/cris/rd-arch-2.d,
gas/cris/rd-arch-3.d, gas/cris/rd-bkw1b.d, gas/cris/rd-bkw2b.d,
gas/cris/rd-bkw3b.d, gas/cris/rd-bound1.d, gas/cris/rd-bound1.s,
gas/cris/rd-bound2.d, gas/cris/rd-bound3.d, gas/cris/rd-bound4.d,
gas/cris/rd-break32.d, gas/cris/rd-ppv1032.d, gas/cris/rd-ppv32.d,
gas/cris/rd-spr-1.d, gas/cris/rd-spr-1.s, gas/cris/rd-usp-1.d,
gas/cris/rd-usp-1b.d, gas/cris/rd-v10_32o-1.d,
gas/cris/rd-v10_32o-2.d, gas/cris/rd-v10_32o-2.s,
gas/cris/rd-v32-b1.d, gas/cris/rd-v32-b1.s, gas/cris/rd-v32-b2.d,
gas/cris/rd-v32-b2.s, gas/cris/rd-v32-b3.d, gas/cris/rd-v32-b3.s,
gas/cris/rd-v32-f1.d, gas/cris/rd-v32-f1.s, gas/cris/rd-v32-i1.d,
gas/cris/rd-v32-i1.s, gas/cris/rd-v32-l1.d, gas/cris/rd-v32-l1.s,
gas/cris/rd-v32-l3.d, gas/cris/rd-v32-l3.s, gas/cris/rd-v32-l4.d,
gas/cris/rd-v32-l4.s, gas/cris/rd-v32o-1.d, gas/cris/rd-v32s-1.d,
gas/cris/rd-v32s-2.d, gas/cris/rd-v32s-2.s, gas/cris/rd-v32s-3.d,
gas/cris/rd-v32s-3.s, gas/cris/rd-v32s-4.d, gas/cris/rd-v32s-4.s,
gas/cris/rd-vao-1.d, gas/cris/v32-err-1.s, gas/cris/v32-err-10.s,
gas/cris/v32-err-11.s, gas/cris/v32-err-2.s, gas/cris/v32-err-3.s,
gas/cris/v32-err-4.s, gas/cris/v32-err-5.s, gas/cris/v32-err-6.s,
gas/cris/v32-err-7.s, gas/cris/v32-err-8.s, gas/cris/v32-err-9.s:
New tests.

77 files changed:
gas/testsuite/ChangeLog
gas/testsuite/gas/all/gas.exp
gas/testsuite/gas/cris/abs32-1.s [new file with mode: 0644]
gas/testsuite/gas/cris/arch-err-1.s [new file with mode: 0644]
gas/testsuite/gas/cris/arch-err-2.s [new file with mode: 0644]
gas/testsuite/gas/cris/arch-err-3.s [new file with mode: 0644]
gas/testsuite/gas/cris/arch-err-4.s [new file with mode: 0644]
gas/testsuite/gas/cris/arch-err-5.s [new file with mode: 0644]
gas/testsuite/gas/cris/bound-err-1.s [new file with mode: 0644]
gas/testsuite/gas/cris/brokw-3b.s [new file with mode: 0644]
gas/testsuite/gas/cris/march-err-1.s [new file with mode: 0644]
gas/testsuite/gas/cris/march-err-2.s [new file with mode: 0644]
gas/testsuite/gas/cris/operand-err-1.s
gas/testsuite/gas/cris/push-err-1.s [new file with mode: 0644]
gas/testsuite/gas/cris/push-err-2.s [new file with mode: 0644]
gas/testsuite/gas/cris/pushpopv32.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-abs32-1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-abs32-2.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-arch-1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-arch-2.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-arch-3.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-bkw1b.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-bkw2b.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-bkw3b.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-bound1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-bound1.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-bound2.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-bound3.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-bound4.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-break32.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-ppv1032.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-ppv32.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-spr-1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-spr-1.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-usp-1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-usp-1b.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v10_32o-1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v10_32o-2.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v10_32o-2.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-b1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-b1.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-b2.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-b2.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-b3.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-b3.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-f1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-f1.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-i1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-i1.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-l1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-l1.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-l3.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-l3.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-l4.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32-l4.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32o-1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32s-1.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32s-2.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32s-2.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32s-3.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32s-3.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32s-4.d [new file with mode: 0644]
gas/testsuite/gas/cris/rd-v32s-4.s [new file with mode: 0644]
gas/testsuite/gas/cris/rd-vao-1.d [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-1.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-10.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-11.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-2.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-3.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-4.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-5.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-6.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-7.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-8.s [new file with mode: 0644]
gas/testsuite/gas/cris/v32-err-9.s [new file with mode: 0644]
gas/testsuite/gas/ieee-fp/x930509a.exp
gas/testsuite/gas/macros/macros.exp

index be4198b..5b2623d 100644 (file)
@@ -1,3 +1,40 @@
+2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
+
+       * gas/all/gas.exp: Exclude float.s for crisv32-*-*.
+       * gas/cris/operand-err-1.s (test.m constant): Remove xfail marker
+       and update rationale.  Mark "ba [external_symbol]" and "ba [r3]"
+       as invalid.
+       * gas/ieee-fp/x930509a.exp: setup_xfail for crisv32-*-*.
+       * gas/macros/macros.exp: setup_xfail strings for crisv32-*-*.
+       * gas/cris/abs32-1.s, gas/cris/arch-err-1.s,
+       gas/cris/arch-err-2.s, gas/cris/arch-err-3.s,
+       gas/cris/arch-err-4.s, gas/cris/arch-err-5.s,
+       gas/cris/bound-err-1.s, gas/cris/brokw-3b.s,
+       gas/cris/march-err-1.s, gas/cris/march-err-2.s,
+       gas/cris/push-err-1.s, gas/cris/push-err-2.s,
+       gas/cris/pushpopv32.s, gas/cris/rd-abs32-1.d,
+       gas/cris/rd-abs32-2.d, gas/cris/rd-arch-1.d, gas/cris/rd-arch-2.d,
+       gas/cris/rd-arch-3.d, gas/cris/rd-bkw1b.d, gas/cris/rd-bkw2b.d,
+       gas/cris/rd-bkw3b.d, gas/cris/rd-bound1.d, gas/cris/rd-bound1.s,
+       gas/cris/rd-bound2.d, gas/cris/rd-bound3.d, gas/cris/rd-bound4.d,
+       gas/cris/rd-break32.d, gas/cris/rd-ppv1032.d, gas/cris/rd-ppv32.d,
+       gas/cris/rd-spr-1.d, gas/cris/rd-spr-1.s, gas/cris/rd-usp-1.d,
+       gas/cris/rd-usp-1b.d, gas/cris/rd-v10_32o-1.d,
+       gas/cris/rd-v10_32o-2.d, gas/cris/rd-v10_32o-2.s,
+       gas/cris/rd-v32-b1.d, gas/cris/rd-v32-b1.s, gas/cris/rd-v32-b2.d,
+       gas/cris/rd-v32-b2.s, gas/cris/rd-v32-b3.d, gas/cris/rd-v32-b3.s,
+       gas/cris/rd-v32-f1.d, gas/cris/rd-v32-f1.s, gas/cris/rd-v32-i1.d,
+       gas/cris/rd-v32-i1.s, gas/cris/rd-v32-l1.d, gas/cris/rd-v32-l1.s,
+       gas/cris/rd-v32-l3.d, gas/cris/rd-v32-l3.s, gas/cris/rd-v32-l4.d,
+       gas/cris/rd-v32-l4.s, gas/cris/rd-v32o-1.d, gas/cris/rd-v32s-1.d,
+       gas/cris/rd-v32s-2.d, gas/cris/rd-v32s-2.s, gas/cris/rd-v32s-3.d,
+       gas/cris/rd-v32s-3.s, gas/cris/rd-v32s-4.d, gas/cris/rd-v32s-4.s,
+       gas/cris/rd-vao-1.d, gas/cris/v32-err-1.s, gas/cris/v32-err-10.s,
+       gas/cris/v32-err-11.s, gas/cris/v32-err-2.s, gas/cris/v32-err-3.s,
+       gas/cris/v32-err-4.s, gas/cris/v32-err-5.s, gas/cris/v32-err-6.s,
+       gas/cris/v32-err-7.s, gas/cris/v32-err-8.s, gas/cris/v32-err-9.s:
+       New tests.
+
 2004-11-04 Jan Beulich <jbeulich@novell.com>
 
        * gas/i386/i386.exp: Execute new tests intelbad and intelok.
index 5f7bb84..6b06a2b 100644 (file)
@@ -24,7 +24,7 @@ if { [istarget hppa*-*-*] || [istarget *c54x*-*-*] } then {
 }
 
 # No floating point support in assembly code for CRIS.
-if ![istarget cris-*-*] then {
+if { ![istarget cris-*-*] && ![istarget crisv32-*-*] } then {
     gas_test "float.s" ""   "" "simple FP constants"
 }
 
diff --git a/gas/testsuite/gas/cris/abs32-1.s b/gas/testsuite/gas/cris/abs32-1.s
new file mode 100644 (file)
index 0000000..07c22b3
--- /dev/null
@@ -0,0 +1,31 @@
+ .text
+  nop
+locsym1:
+  .global locsym2
+locsym2:
+  nop
+  jump locsym1
+  jump locsym2
+  jump locsym3
+  jump locsym4
+  jump extsym
+  jsr locsym1
+  jsr locsym2
+  jsr locsym3
+  jsr locsym4
+  jsr extsym
+  jsrc locsym1
+  .dword 0
+  jsrc locsym2
+  .dword 0
+  jsrc locsym3
+  .dword 0
+  jsrc locsym4
+  .dword 0
+  jsrc extsym
+  .dword 0
+  nop
+  .global locsym3
+locsym3:
+locsym4:
+  nop
diff --git a/gas/testsuite/gas/cris/arch-err-1.s b/gas/testsuite/gas/cris/arch-err-1.s
new file mode 100644 (file)
index 0000000..f2d5c53
--- /dev/null
@@ -0,0 +1,4 @@
+; Test mismatch of --march=ARCH1 and .arch ARCH2.
+; { dg-do assemble }
+ .arch something ; { dg-error "unknown operand to .arch" }
+
diff --git a/gas/testsuite/gas/cris/arch-err-2.s b/gas/testsuite/gas/cris/arch-err-2.s
new file mode 100644 (file)
index 0000000..d8b2dae
--- /dev/null
@@ -0,0 +1,5 @@
+; Test mismatch of --march=ARCH1 and .arch ARCH2.
+; { dg-do assemble }
+; { dg-options "--march=v0_v10" }
+ .arch v32 ; { dg-error ".arch <arch> requires a matching --march=" }
+
diff --git a/gas/testsuite/gas/cris/arch-err-3.s b/gas/testsuite/gas/cris/arch-err-3.s
new file mode 100644 (file)
index 0000000..153f316
--- /dev/null
@@ -0,0 +1,5 @@
+; Test mismatch of --march=ARCH1 and .arch ARCH2.
+; { dg-do assemble }
+; { dg-options "--march=common_v10_v32" }
+ .arch v32 ; { dg-error ".arch <arch> requires a matching --march=" }
+
diff --git a/gas/testsuite/gas/cris/arch-err-4.s b/gas/testsuite/gas/cris/arch-err-4.s
new file mode 100644 (file)
index 0000000..a13828e
--- /dev/null
@@ -0,0 +1,5 @@
+; Test mismatch of --march=ARCH1 and .arch ARCH2.
+; { dg-do assemble }
+; { dg-options "--march=v10" }
+ .arch common_v10_v32 ; { dg-error ".arch <arch> requires a matching --march=" }
+
diff --git a/gas/testsuite/gas/cris/arch-err-5.s b/gas/testsuite/gas/cris/arch-err-5.s
new file mode 100644 (file)
index 0000000..800521f
--- /dev/null
@@ -0,0 +1,5 @@
+; Test mismatch of --march=ARCH1 and .arch ARCH2.
+; { dg-do assemble }
+; { dg-options "--march=v10" }
+ .arch v0_v10 ; { dg-error ".arch <arch> requires a matching --march=" }
+
diff --git a/gas/testsuite/gas/cris/bound-err-1.s b/gas/testsuite/gas/cris/bound-err-1.s
new file mode 100644 (file)
index 0000000..3d3f9c4
--- /dev/null
@@ -0,0 +1,9 @@
+; { dg-do assemble { target cris-*-* } }
+; { dg-options "--march=v32" }
+x:
+ ; Memory operand for bound didn't make it to v32.  Check that
+ ; it's flagged as an error.
+ bound.b [r3],r7       ; { dg-error "operands" }
+ bound.w [r8+],r1      ; { dg-error "operands" }
+ bound.d [r11],r3      ; { dg-error "operands" }
+ nop ; For alignment purposes.
diff --git a/gas/testsuite/gas/cris/brokw-3b.s b/gas/testsuite/gas/cris/brokw-3b.s
new file mode 100644 (file)
index 0000000..d067d04
--- /dev/null
@@ -0,0 +1,115 @@
+; Tests the broken-word function with a real switch table.  CRISv32 version.
+
+start: moveq 0,r0
+
+       subs.b 87,r0
+       bound.b 41,r0
+       lapc sym2,acr
+       addi r0.w,acr
+       adds.w [acr],acr
+       jump acr
+       nop
+sym2:
+       .word   sym1 - .
+       .word   sym3 - .
+       .word   sym4 - .
+       .word   sym5 - .
+       .word   sym6 - .
+       .word   sym7 - .
+       .word   sym8 - .
+       .word   sym9 - .
+       .word   sym10 - .
+       .word   sym11 - .
+       .word   sym12 - .
+       .word   sym13 - .
+       .word   sym14 - .
+       .word   sym15 - .
+       .word   sym16 - .
+       .word   sym17 - .
+       .word   sym18 - .
+       .word   sym19 - .
+       .word   sym20 - .
+       .word   sym21 - .
+       .word   sym22 - .
+       .word   sym23 - .
+       .word   sym24 - .
+       .word   sym25 - .
+       .word   sym26 - .
+       .word   sym27 - .
+       .word   sym28 - .
+       .word   sym29 - .
+       .word   sym30 - .
+       .word   sym31 - .
+       .word   sym32 - .
+       .word   sym33 - .
+       .word   sym34 - .
+       .word   sym35 - .
+       .word   sym36 - .
+       .word   sym37 - .
+       .word   sym38 - .
+       .word   sym39 - .
+       .word   sym40 - .
+       .word   sym41 - .
+       .word   sym42 - .
+       .word   sym43 - .
+
+       .space  16, 0
+
+       moveq 1,r0
+; Medium-range branch around secondary jump table inserted here :
+;      ba      next_label
+;      nop
+;      .skip   2,0
+; Secondary jump table inserted here :
+;      ba      sym1
+;      nop
+;      ba      sym3
+;      nop
+;      ...
+next_label:
+       moveq 2,r0
+
+       .space  32768, 0
+
+sym1:  moveq -3,r0
+sym3: moveq 3,r0
+sym4: moveq 4,r0
+sym5: moveq 5,r0
+sym6: moveq 6,r0
+sym7: moveq 7,r0
+sym8: moveq 8,r0
+sym9: moveq 9,r0
+sym10: moveq 10,r0
+sym11: moveq 11,r0
+sym12: moveq 12,r0
+sym13: moveq 13,r0
+sym14: moveq 14,r0
+sym15: moveq 15,r0
+sym16: moveq 16,r0
+sym17: moveq 17,r0
+sym18: moveq 18,r0
+sym19: moveq 19,r0
+sym20: moveq 20,r0
+sym21: moveq 21,r0
+sym22: moveq 22,r0
+sym23: moveq 23,r0
+sym24: moveq 24,r0
+sym25: moveq 25,r0
+sym26: moveq 26,r0
+sym27: moveq 27,r0
+sym28: moveq 28,r0
+sym29: moveq 29,r0
+sym30: moveq 30,r0
+sym31: moveq 31,r0
+sym32: moveq -32,r0
+sym33: moveq -31,r0
+sym34: moveq -30,r0
+sym35: moveq -29,r0
+sym36: moveq -28,r0
+sym37: moveq -27,r0
+sym38: moveq -26,r0
+sym39: moveq -25,r0
+sym40: moveq -24,r0
+sym41: moveq -23,r0
+sym42: moveq -22,r0
+sym43: moveq -21,r0
diff --git a/gas/testsuite/gas/cris/march-err-1.s b/gas/testsuite/gas/cris/march-err-1.s
new file mode 100644 (file)
index 0000000..b646f10
--- /dev/null
@@ -0,0 +1,5 @@
+; Test unsupported ARCH in -march=ARCH.
+; { dg-do assemble }
+; { dg-options "--march=whatever" }
+; { dg-error ".* invalid <arch> in --march=<arch>: whatever" "" { target cris-*-* } 0 }
+ nop
diff --git a/gas/testsuite/gas/cris/march-err-2.s b/gas/testsuite/gas/cris/march-err-2.s
new file mode 100644 (file)
index 0000000..f27f09e
--- /dev/null
@@ -0,0 +1,6 @@
+; Test unsupported ARCH in -march=ARCH, where there's an option
+; which is a proper substring.
+; { dg-do assemble }
+; { dg-options "--march=v10_v32" }
+; { dg-error ".* invalid <arch> in --march=<arch>: v10_v32" "" { target cris-*-* } 0 }
+ nop
index e042cc3..cd806f9 100644 (file)
@@ -12,16 +12,21 @@ start:
  test.d [r3],r4 ; { dg-error "(Illegal|Invalid) operands" }
  move.d [r3],r4,r5 ; { dg-error "(Illegal|Invalid) operands" }
 
-; These two *might* be useful in extreme cases, so maybe the following
-; should not be considered an error in the first place.
- test.d whatever ; { dg-error "(Illegal|Invalid) operands" "" { xfail *-*-* } }
- test.d 42 ; { dg-error "(Illegal|Invalid) operands" "" { xfail *-*-* } }
+; These two could be seen useful in extreme cases, but those
+; would be shadowed by not flagging erroneous use of
+; e.g. "test.d $r3" for CRISv32.  If you really need it, use
+; e.g. "test.d [$pc+] @ .dword whatever".
+ test.d whatever ; { dg-error "(Illegal|Invalid) operands" "" }
+ test.d 42 ; { dg-error "(Illegal|Invalid) operands" "" }
 
  clear.d whatever ; { dg-error "(Illegal|Invalid) operands" }
  clear.d 42 ; { dg-error "(Illegal|Invalid) operands" }
  addi r5,r3 ; { dg-error "(Illegal|Invalid) operands" }
- ba [external_symbol] ; Not an error, just obscure and generally useless.
- ba [r3] ; Not an error, just obscure and generally useless.
+
+; These two are valid instructions, though not recognized by
+; the assembler since they're obscure and generally useless.
+ ba [external_symbol] ; { dg-error "(Illegal|Invalid) operands|(B|b)ad expression" }
+ ba [r3] ; { dg-error "(Illegal|Invalid) operands|(B|b)ad expression" }
  lsl r3,r5 ; { dg-error "(Illegal|Invalid) operands" }
  xor.d r5,r6 ; { dg-error "(Illegal|Invalid) operands" }
 
diff --git a/gas/testsuite/gas/cris/push-err-1.s b/gas/testsuite/gas/cris/push-err-1.s
new file mode 100644 (file)
index 0000000..acf1b6f
--- /dev/null
@@ -0,0 +1,8 @@
+; { dg-do assemble { target cris-*-* } }
+; { dg-options "--march=v32" }
+x:
+ ; There are no "push" or "pop" synonyms for v32.
+ push $r10     ; { dg-error "Unknown" }
+ push $srp     ; { dg-error "Unknown" }
+ pop $r8       ; { dg-error "Unknown" }
+ pop $mof      ; { dg-error "Unknown" }
diff --git a/gas/testsuite/gas/cris/push-err-2.s b/gas/testsuite/gas/cris/push-err-2.s
new file mode 100644 (file)
index 0000000..7717ee7
--- /dev/null
@@ -0,0 +1,9 @@
+; { dg-do assemble { target cris-*-* } }
+; { dg-options "--march=common_v10_v32" }
+x:
+; There are no "push" or "pop" synonyms for the compatible
+; subset of v10 and v32.
+ push $r10     ; { dg-error "Unknown" }
+ push $srp     ; { dg-error "Unknown" }
+ pop $r8       ; { dg-error "Unknown" }
+ pop $mof      ; { dg-error "Unknown" }
diff --git a/gas/testsuite/gas/cris/pushpopv32.s b/gas/testsuite/gas/cris/pushpopv32.s
new file mode 100644 (file)
index 0000000..a41d80b
--- /dev/null
@@ -0,0 +1,11 @@
+; Check that push and pop builtin "macros" aren't recognized for
+; v32.
+ .text
+start:
+ subq 4,sp
+ move.d r10,[sp]
+ subq 4,sp
+ move srp,[sp]
+ move.d [sp+],r10
+ move [sp+],srp
+end:
diff --git a/gas/testsuite/gas/cris/rd-abs32-1.d b/gas/testsuite/gas/cris/rd-abs32-1.d
new file mode 100644 (file)
index 0000000..4e02f39
--- /dev/null
@@ -0,0 +1,61 @@
+#source: abs32-1.s
+#as: --em=criself
+#objdump: -dr
+
+# Check that jump-type instructions to absolute addresses
+# assemble and disassemble correctly.
+
+.*:     file format .*-cris
+
+Disassembly of section \.text:
+
+00000000 <locsym2-0x2>:
+   0:  0f05                    nop 
+
+00000002 <locsym2>:
+   2:  0f05                    nop 
+   4:  3f0d 0200 0000          jump 2 <locsym2>
+                       6: R_CRIS_32    \.text\+0x2
+   a:  3f0d 0200 0000          jump 2 <locsym2>
+                       c: R_CRIS_32    locsym2
+  10:  3f0d 7400 0000          jump 74 <locsym3>
+                       12: R_CRIS_32   locsym3
+  16:  3f0d 7400 0000          jump 74 <locsym3>
+                       18: R_CRIS_32   \.text\+0x74
+  1c:  3f0d 0000 0000          jump 0 <locsym2-0x2>
+                       1e: R_CRIS_32   extsym
+  22:  3fbd 0200 0000          jsr 2 <locsym2>
+                       24: R_CRIS_32   \.text\+0x2
+  28:  3fbd 0200 0000          jsr 2 <locsym2>
+                       2a: R_CRIS_32   locsym2
+  2e:  3fbd 7400 0000          jsr 74 <locsym3>
+                       30: R_CRIS_32   locsym3
+  34:  3fbd 7400 0000          jsr 74 <locsym3>
+                       36: R_CRIS_32   \.text\+0x74
+  3a:  3fbd 0000 0000          jsr 0 <locsym2-0x2>
+                       3c: R_CRIS_32   extsym
+  40:  3f3d 0200 0000          jsrc 2 <locsym2>
+                       42: R_CRIS_32   \.text\+0x2
+  46:  0000                    bcc \.\+2
+  48:  0000                    bcc \.\+2
+  4a:  3f3d 0200 0000          jsrc 2 <locsym2>
+                       4c: R_CRIS_32   locsym2
+  50:  0000                    bcc \.\+2
+  52:  0000                    bcc \.\+2
+  54:  3f3d 7400 0000          jsrc 74 <locsym3>
+                       56: R_CRIS_32   locsym3
+  5a:  0000                    bcc \.\+2
+  5c:  0000                    bcc \.\+2
+  5e:  3f3d 7400 0000          jsrc 74 <locsym3>
+                       60: R_CRIS_32   \.text\+0x74
+  64:  0000                    bcc \.\+2
+  66:  0000                    bcc \.\+2
+  68:  3f3d 0000 0000          jsrc 0 <locsym2-0x2>
+                       6a: R_CRIS_32   extsym
+  6e:  0000                    bcc \.\+2
+  70:  0000                    bcc \.\+2
+  72:  0f05                    nop 
+
+00000074 <locsym3>:
+  74:  0f05                    nop 
+       \.\.\.
diff --git a/gas/testsuite/gas/cris/rd-abs32-2.d b/gas/testsuite/gas/cris/rd-abs32-2.d
new file mode 100644 (file)
index 0000000..d13c8a8
--- /dev/null
@@ -0,0 +1,62 @@
+#source: abs32-1.s
+#as: --em=criself --march=v32
+#objdump: -dr
+
+# Check that jump-type instructions to absolute addresses
+# assemble and disassemble correctly for v32 given "old-style"
+# mnemonics.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <locsym2-0x2>:
+   0:  b005                    nop 
+
+00000002 <locsym2>:
+   2:  b005                    nop 
+   4:  bf0d 0000 0000          jump 0 <locsym2-0x2>
+                       6: R_CRIS_32    \.text\+0x2
+   a:  bf0d 0000 0000          jump 0 <locsym2-0x2>
+                       c: R_CRIS_32    locsym2
+  10:  bf0d 0000 0000          jump 0 <locsym2-0x2>
+                       12: R_CRIS_32   locsym3
+  16:  bf0d 0000 0000          jump 0 <locsym2-0x2>
+                       18: R_CRIS_32   \.text\+0x74
+  1c:  bf0d 0000 0000          jump 0 <locsym2-0x2>
+                       1e: R_CRIS_32   extsym
+  22:  bfbd 0000 0000          jsr 0 <locsym2-0x2>
+                       24: R_CRIS_32   \.text\+0x2
+  28:  bfbd 0000 0000          jsr 0 <locsym2-0x2>
+                       2a: R_CRIS_32   locsym2
+  2e:  bfbd 0000 0000          jsr 0 <locsym2-0x2>
+                       30: R_CRIS_32   locsym3
+  34:  bfbd 0000 0000          jsr 0 <locsym2-0x2>
+                       36: R_CRIS_32   \.text\+0x74
+  3a:  bfbd 0000 0000          jsr 0 <locsym2-0x2>
+                       3c: R_CRIS_32   extsym
+  40:  3fbf 0000 0000          jsrc 0 <locsym2-0x2>
+                       42: R_CRIS_32   \.text\+0x2
+  46:  0000                    bcc \.
+  48:  0000                    bcc \.
+  4a:  3fbf 0000 0000          jsrc 0 <locsym2-0x2>
+                       4c: R_CRIS_32   locsym2
+  50:  0000                    bcc \.
+  52:  0000                    bcc \.
+  54:  3fbf 0000 0000          jsrc 0 <locsym2-0x2>
+                       56: R_CRIS_32   locsym3
+  5a:  0000                    bcc \.
+  5c:  0000                    bcc \.
+  5e:  3fbf 0000 0000          jsrc 0 <locsym2-0x2>
+                       60: R_CRIS_32   \.text\+0x74
+  64:  0000                    bcc \.
+  66:  0000                    bcc \.
+  68:  3fbf 0000 0000          jsrc 0 <locsym2-0x2>
+                       6a: R_CRIS_32   extsym
+  6e:  0000                    bcc \.
+  70:  0000                    bcc \.
+  72:  b005                    nop 
+
+00000074 <locsym3>:
+  74:  b005                    nop 
+       \.\.\.
diff --git a/gas/testsuite/gas/cris/rd-arch-1.d b/gas/testsuite/gas/cris/rd-arch-1.d
new file mode 100644 (file)
index 0000000..a3bd076
--- /dev/null
@@ -0,0 +1,7 @@
+#source: arch-err-2.s
+#as: --march=v32
+#objdump: -p
+
+#...
+private flags = 3: \[symbols have a _ prefix\] \[v32\]
+#pass
diff --git a/gas/testsuite/gas/cris/rd-arch-2.d b/gas/testsuite/gas/cris/rd-arch-2.d
new file mode 100644 (file)
index 0000000..8886a72
--- /dev/null
@@ -0,0 +1,7 @@
+#source: arch-err-4.s
+#as: --march=common_v10_v32
+#objdump: -p
+
+#...
+private flags = 5: \[symbols have a _ prefix\] \[v10 and v32\]
+#pass
diff --git a/gas/testsuite/gas/cris/rd-arch-3.d b/gas/testsuite/gas/cris/rd-arch-3.d
new file mode 100644 (file)
index 0000000..e77ff0d
--- /dev/null
@@ -0,0 +1,7 @@
+#source: arch-err-5.s
+#as: --march=v0_v10
+#objdump: -p
+
+#...
+private flags = 1: \[symbols have a _ prefix\]
+#pass
diff --git a/gas/testsuite/gas/cris/rd-bkw1b.d b/gas/testsuite/gas/cris/rd-bkw1b.d
new file mode 100644 (file)
index 0000000..7d4978f
--- /dev/null
@@ -0,0 +1,23 @@
+#as: --em=criself --march=v32
+#source: brokw-1.s
+#objdump: -dr
+
+.*:     file format .*-cris
+
+Disassembly of section \.text:
+0+ <sym2>:
+[       ]+0:[   ]+4002[        ]+moveq[ ]+0,r0
+[       ]+2:[   ]+0c00[        ]+.*
+[       ]+4:[   ]+4102[        ]+moveq[ ]+1,r0
+[       ]+6:[   ]+0ee0[        ]+ba[ ]+14 <next_label>
+[       ]+8:[   ]+b005[        ]+nop[ ]*
+[       ]+a:[   ]+b005[        ]+nop[ ]*
+[       ]+c:[   ]+bf0e 0880 0000[      ]+ba[ ]+8014 <sym1>
+[       ]+12:[  ]+b005[        ]+nop[ ]*
+0+14 <next_label>:
+[       ]+14:[  ]+4202[        ]+moveq[ ]+2,r0
+[      ]+\.\.\.
+0+8014 <sym1>:
+[       ]+8014:[        ]+4302[        ]+moveq[ ]+3,r0
+[      ]+\.\.\.
+
diff --git a/gas/testsuite/gas/cris/rd-bkw2b.d b/gas/testsuite/gas/cris/rd-bkw2b.d
new file mode 100644 (file)
index 0000000..15c727d
--- /dev/null
@@ -0,0 +1,27 @@
+#as: --em=criself --march=v32
+#source: brokw-2.s
+#objdump: -dr
+
+.*:     file format .*-cris
+
+Disassembly of section \.text:
+0+ <sym2>:
+[       ]+0:[   ]+4002[        ]+moveq[ ]+0,r0
+[       ]+2:[   ]+1600[        ]+.*
+[       ]+4:[   ]+0e00[        ]+.*
+[       ]+6:[   ]+4102[        ]+moveq[ ]+1,r0
+[       ]+8:[   ]+16e0[        ]+ba[ ]+1e <next_label>
+[       ]+a:[   ]+b005[        ]+nop[ ]*
+[       ]+c:[   ]+b005[        ]+nop[ ]*
+[       ]+e:[   ]+bf0e 1280 0000[      ]+ba[ ]+8020 <sym3>
+[       ]+14:[  ]+b005[        ]+nop[ ]*
+[       ]+16:[  ]+bf0e 0880 0000[      ]+ba[ ]+801e <sym1>
+[       ]+1c:[  ]+b005[        ]+nop[ ]*
+0+1e <next_label>:
+[       ]+1e:[  ]+4202[        ]+moveq[ ]+2,r0
+[      ]+\.\.\.
+0+801e <sym1>:
+[       ]+801e:[        ]+4302[        ]+moveq[ ]+3,r0
+0+8020 <sym3>:
+[       ]+8020:[        ]+4402[        ]+moveq[ ]+4,r0
+[      ]+\.\.\.
diff --git a/gas/testsuite/gas/cris/rd-bkw3b.d b/gas/testsuite/gas/cris/rd-bkw3b.d
new file mode 100644 (file)
index 0000000..8e3ac4e
--- /dev/null
@@ -0,0 +1,282 @@
+#as: --em=criself --march=v32
+#source: brokw-3b.s
+#objdump: -dr
+
+.*:     file format .*-cris
+
+Disassembly of section \.text:
+
+00000000 <start>:
+       0:      4002                    moveq 0,r0
+       2:      af0c 5700               subs\.b 87,r0
+       6:      cf0d 2900               bound\.b 0x29,r0
+       a:      75f9                    lapcq 14 <sym2>,acr
+       c:      1f05                    addi r0\.w,acr
+       e:      3ff8                    adds\.w \[acr\],acr
+      10:      bf09                    jump acr
+      12:      b005                    nop 
+
+00000014 <sym2>:
+      14:      b401 .*
+      16:      aa01 .*
+      18:      a001 .*
+      1a:      9601 .*
+      1c:      8c01 .*
+      1e:      8201 .*
+      20:      7801 .*
+      22:      6e01 .*
+      24:      6401 .*
+      26:      5a01 .*
+      28:      5001 .*
+      2a:      4601 .*
+      2c:      3c01 .*
+      2e:      3201 .*
+      30:      2801 .*
+      32:      1e01 .*
+      34:      1401 .*
+      36:      0a01 .*
+      38:      0001 .*
+      3a:      f600 .*
+      3c:      ec00 .*
+      3e:      e200 .*
+      40:      d800 .*
+      42:      ce00 .*
+      44:      c400 .*
+      46:      ba00 .*
+      48:      b000 .*
+      4a:      a600 .*
+      4c:      9c00 .*
+      4e:      9200 .*
+      50:      8800 .*
+      52:      7e00 .*
+      54:      7400 .*
+      56:      6a00 .*
+      58:      6000 .*
+      5a:      5600 .*
+      5c:      4c00 .*
+      5e:      4200 .*
+      60:      3800 .*
+      62:      2e00 .*
+      64:      2400 .*
+      66:      1a00 .*
+      68:      0000 .*
+       \.\.\.
+      76:      0000 .*
+      78:      4102                    moveq 1,r0
+      7a:      ffed 5601               ba 1d0 <next_label>
+      7e:      b005                    nop 
+      80:      bf0e a481 0000          ba 8224 <sym43>
+      86:      b005                    nop 
+      88:      bf0e 9a81 0000          ba 8222 <sym42>
+      8e:      b005                    nop 
+      90:      bf0e 9081 0000          ba 8220 <sym41>
+      96:      b005                    nop 
+      98:      bf0e 8681 0000          ba 821e <sym40>
+      9e:      b005                    nop 
+      a0:      bf0e 7c81 0000          ba 821c <sym39>
+      a6:      b005                    nop 
+      a8:      bf0e 7281 0000          ba 821a <sym38>
+      ae:      b005                    nop 
+      b0:      bf0e 6881 0000          ba 8218 <sym37>
+      b6:      b005                    nop 
+      b8:      bf0e 5e81 0000          ba 8216 <sym36>
+      be:      b005                    nop 
+      c0:      bf0e 5481 0000          ba 8214 <sym35>
+      c6:      b005                    nop 
+      c8:      bf0e 4a81 0000          ba 8212 <sym34>
+      ce:      b005                    nop 
+      d0:      bf0e 4081 0000          ba 8210 <sym33>
+      d6:      b005                    nop 
+      d8:      bf0e 3681 0000          ba 820e <sym32>
+      de:      b005                    nop 
+      e0:      bf0e 2c81 0000          ba 820c <sym31>
+      e6:      b005                    nop 
+      e8:      bf0e 2281 0000          ba 820a <sym30>
+      ee:      b005                    nop 
+      f0:      bf0e 1881 0000          ba 8208 <sym29>
+      f6:      b005                    nop 
+      f8:      bf0e 0e81 0000          ba 8206 <sym28>
+      fe:      b005                    nop 
+     100:      bf0e 0481 0000          ba 8204 <sym27>
+     106:      b005                    nop 
+     108:      bf0e fa80 0000          ba 8202 <sym26>
+     10e:      b005                    nop 
+     110:      bf0e f080 0000          ba 8200 <sym25>
+     116:      b005                    nop 
+     118:      bf0e e680 0000          ba 81fe <sym24>
+     11e:      b005                    nop 
+     120:      bf0e dc80 0000          ba 81fc <sym23>
+     126:      b005                    nop 
+     128:      bf0e d280 0000          ba 81fa <sym22>
+     12e:      b005                    nop 
+     130:      bf0e c880 0000          ba 81f8 <sym21>
+     136:      b005                    nop 
+     138:      bf0e be80 0000          ba 81f6 <sym20>
+     13e:      b005                    nop 
+     140:      bf0e b480 0000          ba 81f4 <sym19>
+     146:      b005                    nop 
+     148:      bf0e aa80 0000          ba 81f2 <sym18>
+     14e:      b005                    nop 
+     150:      bf0e a080 0000          ba 81f0 <sym17>
+     156:      b005                    nop 
+     158:      bf0e 9680 0000          ba 81ee <sym16>
+     15e:      b005                    nop 
+     160:      bf0e 8c80 0000          ba 81ec <sym15>
+     166:      b005                    nop 
+     168:      bf0e 8280 0000          ba 81ea <sym14>
+     16e:      b005                    nop 
+     170:      bf0e 7880 0000          ba 81e8 <sym13>
+     176:      b005                    nop 
+     178:      bf0e 6e80 0000          ba 81e6 <sym12>
+     17e:      b005                    nop 
+     180:      bf0e 6480 0000          ba 81e4 <sym11>
+     186:      b005                    nop 
+     188:      bf0e 5a80 0000          ba 81e2 <sym10>
+     18e:      b005                    nop 
+     190:      bf0e 5080 0000          ba 81e0 <sym9>
+     196:      b005                    nop 
+     198:      bf0e 4680 0000          ba 81de <sym8>
+     19e:      b005                    nop 
+     1a0:      bf0e 3c80 0000          ba 81dc <sym7>
+     1a6:      b005                    nop 
+     1a8:      bf0e 3280 0000          ba 81da <sym6>
+     1ae:      b005                    nop 
+     1b0:      bf0e 2880 0000          ba 81d8 <sym5>
+     1b6:      b005                    nop 
+     1b8:      bf0e 1e80 0000          ba 81d6 <sym4>
+     1be:      b005                    nop 
+     1c0:      bf0e 1480 0000          ba 81d4 <sym3>
+     1c6:      b005                    nop 
+     1c8:      bf0e 0a80 0000          ba 81d2 <sym1>
+     1ce:      b005                    nop 
+
+000001d0 <next_label>:
+     1d0:      4202                    moveq 2,r0
+       \.\.\.
+
+000081d2 <sym1>:
+    81d2:      7d02                    moveq -3,r0
+
+000081d4 <sym3>:
+    81d4:      4302                    moveq 3,r0
+
+000081d6 <sym4>:
+    81d6:      4402                    moveq 4,r0
+
+000081d8 <sym5>:
+    81d8:      4502                    moveq 5,r0
+
+000081da <sym6>:
+    81da:      4602                    moveq 6,r0
+
+000081dc <sym7>:
+    81dc:      4702                    moveq 7,r0
+
+000081de <sym8>:
+    81de:      4802                    moveq 8,r0
+
+000081e0 <sym9>:
+    81e0:      4902                    moveq 9,r0
+
+000081e2 <sym10>:
+    81e2:      4a02                    moveq 10,r0
+
+000081e4 <sym11>:
+    81e4:      4b02                    moveq 11,r0
+
+000081e6 <sym12>:
+    81e6:      4c02                    moveq 12,r0
+
+000081e8 <sym13>:
+    81e8:      4d02                    moveq 13,r0
+
+000081ea <sym14>:
+    81ea:      4e02                    moveq 14,r0
+
+000081ec <sym15>:
+    81ec:      4f02                    moveq 15,r0
+
+000081ee <sym16>:
+    81ee:      5002                    moveq 16,r0
+
+000081f0 <sym17>:
+    81f0:      5102                    moveq 17,r0
+
+000081f2 <sym18>:
+    81f2:      5202                    moveq 18,r0
+
+000081f4 <sym19>:
+    81f4:      5302                    moveq 19,r0
+
+000081f6 <sym20>:
+    81f6:      5402                    moveq 20,r0
+
+000081f8 <sym21>:
+    81f8:      5502                    moveq 21,r0
+
+000081fa <sym22>:
+    81fa:      5602                    moveq 22,r0
+
+000081fc <sym23>:
+    81fc:      5702                    moveq 23,r0
+
+000081fe <sym24>:
+    81fe:      5802                    moveq 24,r0
+
+00008200 <sym25>:
+    8200:      5902                    moveq 25,r0
+
+00008202 <sym26>:
+    8202:      5a02                    moveq 26,r0
+
+00008204 <sym27>:
+    8204:      5b02                    moveq 27,r0
+
+00008206 <sym28>:
+    8206:      5c02                    moveq 28,r0
+
+00008208 <sym29>:
+    8208:      5d02                    moveq 29,r0
+
+0000820a <sym30>:
+    820a:      5e02                    moveq 30,r0
+
+0000820c <sym31>:
+    820c:      5f02                    moveq 31,r0
+
+0000820e <sym32>:
+    820e:      6002                    moveq -32,r0
+
+00008210 <sym33>:
+    8210:      6102                    moveq -31,r0
+
+00008212 <sym34>:
+    8212:      6202                    moveq -30,r0
+
+00008214 <sym35>:
+    8214:      6302                    moveq -29,r0
+
+00008216 <sym36>:
+    8216:      6402                    moveq -28,r0
+
+00008218 <sym37>:
+    8218:      6502                    moveq -27,r0
+
+0000821a <sym38>:
+    821a:      6602                    moveq -26,r0
+
+0000821c <sym39>:
+    821c:      6702                    moveq -25,r0
+
+0000821e <sym40>:
+    821e:      6802                    moveq -24,r0
+
+00008220 <sym41>:
+    8220:      6902                    moveq -23,r0
+
+00008222 <sym42>:
+    8222:      6a02                    moveq -22,r0
+
+00008224 <sym43>:
+    8224:      6b02                    moveq -21,r0
+       \.\.\.
diff --git a/gas/testsuite/gas/cris/rd-bound1.d b/gas/testsuite/gas/cris/rd-bound1.d
new file mode 100644 (file)
index 0000000..44d5f7c
--- /dev/null
@@ -0,0 +1,11 @@
+#as: --em=criself
+#objdump: -dr
+.*:     file format elf32-us-cris
+Disassembly of section \.text:
+0+ <x>:
+[      ]+0:[   ]+c375[         ]+bound\.b r3,r7
+[      ]+2:[   ]+d815[         ]+bound\.w r8,r1
+[      ]+4:[   ]+eb35[         ]+bound\.d r11,r3
+[      ]+6:[   ]+cf2d 4200[    ]+bound\.b 0x42,r2
+[      ]+a:[   ]+df0d 6810[    ]+bound\.w 0x1068,r0
+[      ]+e:[   ]+ef5d 6a16 4000[       ]+bound\.d 40166a <x\+0x40166a>,r5
diff --git a/gas/testsuite/gas/cris/rd-bound1.s b/gas/testsuite/gas/cris/rd-bound1.s
new file mode 100644 (file)
index 0000000..f004276
--- /dev/null
@@ -0,0 +1,8 @@
+; Some simple bound operands, but no memory operands.
+x:
+ bound.b r3,r7
+ bound.w r8,r1
+ bound.d r11,r3
+ bound.b 0x42,r2
+ bound.w 4200,r0
+ bound.d 4200042,r5
diff --git a/gas/testsuite/gas/cris/rd-bound2.d b/gas/testsuite/gas/cris/rd-bound2.d
new file mode 100644 (file)
index 0000000..d249e6d
--- /dev/null
@@ -0,0 +1,15 @@
+#as: --em=criself --march=v32
+#source: rd-bound1.s
+#objdump: -dr
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+0+ <x>:
+[      ]+0:[   ]+c375[         ]+bound\.b r3,r7
+[      ]+2:[   ]+d815[         ]+bound\.w r8,r1
+[      ]+4:[   ]+eb35[         ]+bound\.d r11,r3
+[      ]+6:[   ]+cf2d 4200[    ]+bound\.b 0x42,r2
+[      ]+a:[   ]+df0d 6810[    ]+bound\.w 0x1068,r0
+[      ]+e:[   ]+ef5d 6a16 4000[       ]+bound.d 40166a <x\+0x40166a>,r5
diff --git a/gas/testsuite/gas/cris/rd-bound3.d b/gas/testsuite/gas/cris/rd-bound3.d
new file mode 100644 (file)
index 0000000..d467e59
--- /dev/null
@@ -0,0 +1,14 @@
+#as: --em=criself --march=v10
+#source: bound-err-1.s
+#objdump: -dr
+
+# A bound insn with a memory operand is an error for v32, but is
+# valid for v10.  Check.
+
+.*:     file format elf32-us-cris
+Disassembly of section \.text:
+0+ <x>:
+[      ]+0:[   ]+c379[         ]+bound\.b \[r3\],r7
+[      ]+2:[   ]+d81d[         ]+bound\.w \[r8\+\],r1
+[      ]+4:[   ]+eb39[         ]+bound\.d \[r11\],r3
+[      ]+6:[   ]+0f05[         ]+nop 
diff --git a/gas/testsuite/gas/cris/rd-bound4.d b/gas/testsuite/gas/cris/rd-bound4.d
new file mode 100644 (file)
index 0000000..381a44e
--- /dev/null
@@ -0,0 +1,18 @@
+#as: --em=criself --march=common_v10_v32
+#source: rd-bound1.s
+#objdump: -dr
+
+# Bound with register and immediate are part of the common
+# v10+v32 subset.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+0+ <x>:
+[      ]+0:[   ]+c375[         ]+bound\.b r3,r7
+[      ]+2:[   ]+d815[         ]+bound\.w r8,r1
+[      ]+4:[   ]+eb35[         ]+bound\.d r11,r3
+[      ]+6:[   ]+cf2d 4200[    ]+bound\.b 0x42,r2
+[      ]+a:[   ]+df0d 6810[    ]+bound\.w 0x1068,r0
+[      ]+e:[   ]+ef5d 6a16 4000[       ]+bound.d 40166a <x\+0x40166a>,r5
diff --git a/gas/testsuite/gas/cris/rd-break32.d b/gas/testsuite/gas/cris/rd-break32.d
new file mode 100644 (file)
index 0000000..7959ecf
--- /dev/null
@@ -0,0 +1,28 @@
+#as: --march=v32
+#source: break.s
+#objdump: -dr
+
+.*:[   ]+file format .*-cris
+
+Disassembly of section \.text:
+0+ <start>:
+[       ]+0:[   ]+32e9[        ]+break[ ]+2
+[       ]+2:[   ]+30e9[        ]+break[ ]+0
+[       ]+4:[   ]+31e9[        ]+break[ ]+1
+[       ]+6:[   ]+32e9[        ]+break[ ]+2
+[       ]+8:[   ]+33e9[        ]+break[ ]+3
+[       ]+a:[   ]+34e9[        ]+break[ ]+4
+[       ]+c:[   ]+35e9[        ]+break[ ]+5
+[       ]+e:[   ]+36e9[        ]+break[ ]+6
+[       ]+10:[  ]+37e9[        ]+break[ ]+7
+[       ]+12:[  ]+38e9[        ]+break[ ]+8
+[       ]+14:[  ]+39e9[        ]+break[ ]+9
+[       ]+16:[  ]+3ae9[        ]+break[ ]+10
+[       ]+18:[  ]+3be9[        ]+break[ ]+11
+[       ]+1a:[  ]+3ce9[        ]+break[ ]+12
+[       ]+1c:[  ]+3de9[        ]+break[ ]+13
+[       ]+1e:[  ]+3ee9[        ]+break[ ]+14
+[       ]+20:[  ]+3fe9[        ]+break[ ]+15
+
+0+22 <end>:
+       \.\.\.
diff --git a/gas/testsuite/gas/cris/rd-ppv1032.d b/gas/testsuite/gas/cris/rd-ppv1032.d
new file mode 100644 (file)
index 0000000..d545fbd
--- /dev/null
@@ -0,0 +1,15 @@
+#source: pushpopv32.s
+#as: --march=common_v10_v32
+#objdump: -dr
+#name: pushpopv1032
+
+.*:[   ]+file format .*-cris
+
+Disassembly of section \.text:
+0+ <start>:
+[      ]+0:[   ]+84e2[         ]+subq 4,sp
+[      ]+2:[   ]+eeab[         ]+move\.d r10,\[sp\]
+[      ]+4:[   ]+84e2[         ]+subq 4,sp
+[      ]+6:[   ]+7eba[         ]+move srp,\[sp\]
+[      ]+8:[   ]+6eae[         ]+move\.d \[sp\+\],r10
+[      ]+a:[   ]+3ebe[         ]+move \[sp\+\],srp
diff --git a/gas/testsuite/gas/cris/rd-ppv32.d b/gas/testsuite/gas/cris/rd-ppv32.d
new file mode 100644 (file)
index 0000000..abc74fb
--- /dev/null
@@ -0,0 +1,15 @@
+#source: pushpopv32.s
+#as: --march=v32
+#objdump: -dr
+#name: pushpopv32
+
+.*:[   ]+file format .*-cris
+
+Disassembly of section \.text:
+0+ <start>:
+[      ]+0:[   ]+84e2[         ]+subq 4,sp
+[      ]+2:[   ]+eeab[         ]+move\.d r10,\[sp\]
+[      ]+4:[   ]+84e2[         ]+subq 4,sp
+[      ]+6:[   ]+7eba[         ]+move srp,\[sp\]
+[      ]+8:[   ]+6eae[         ]+move\.d \[sp\+\],r10
+[      ]+a:[   ]+3ebe[         ]+move \[sp\+\],srp
diff --git a/gas/testsuite/gas/cris/rd-spr-1.d b/gas/testsuite/gas/cris/rd-spr-1.d
new file mode 100644 (file)
index 0000000..347b0b3
--- /dev/null
@@ -0,0 +1,42 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+# Check support for support function register names.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <a>:
+   0:  7a0f                    move s0,r10
+   2:  791f                    move s1,r9
+   4:  781f                    move s1,r8
+   6:  772f                    move s2,r7
+   8:  762f                    move s2,r6
+   a:  753f                    move s3,r5
+   c:  743f                    move s3,r4
+   e:  734f                    move s4,r3
+  10:  724f                    move s4,r2
+  12:  718f                    move s8,r1
+  14:  709f                    move s9,r0
+  16:  7f8f                    move s8,acr
+  18:  7e9f                    move s9,sp
+  1a:  7daf                    move s10,r13
+  1c:  7bff                    move s15,r11
+
+0000001e <b>:
+  1e:  790b                    move r9,s0
+  20:  7a1b                    move r10,s1
+  22:  771b                    move r7,s1
+  24:  782b                    move r8,s2
+  26:  752b                    move r5,s2
+  28:  763b                    move r6,s3
+  2a:  733b                    move r3,s3
+  2c:  744b                    move r4,s4
+  2e:  714b                    move r1,s4
+  30:  708b                    move r0,s8
+  32:  7f9b                    move acr,s9
+  34:  728b                    move r2,s8
+  36:  7d9b                    move r13,s9
+  38:  7bab                    move r11,s10
+  3a:  7efb                    move sp,s15
diff --git a/gas/testsuite/gas/cris/rd-spr-1.s b/gas/testsuite/gas/cris/rd-spr-1.s
new file mode 100644 (file)
index 0000000..3758d39
--- /dev/null
@@ -0,0 +1,32 @@
+a:
+ move s0,r10
+ move s1,r9
+ move s1,r8
+ move s2,r7
+ move s2,r6
+ move s3,r5
+ move s3,r4
+ move s4,r3
+ move s4,r2
+ move s8,r1
+ move s9,r0
+ move s8,r15
+ move s9,r14
+ move s10,r13
+ move s15,r11
+b:
+ move r9,s0
+ move r10,s1
+ move r7,s1
+ move r8,s2
+ move r5,s2
+ move r6,s3
+ move r3,s3
+ move r4,s4
+ move r1,s4
+ move r0,s8
+ move r15,s9
+ move r2,s8
+ move r13,s9
+ move r11,s10
+ move r14,s15
diff --git a/gas/testsuite/gas/cris/rd-usp-1.d b/gas/testsuite/gas/cris/rd-usp-1.d
new file mode 100644 (file)
index 0000000..2ded594
--- /dev/null
@@ -0,0 +1,15 @@
+#objdump: -dr
+#as: --march=v10
+#source: v32-err-8.s
+
+# Check that USP gets the right number for V10.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+   0:  3af6                    move r10,usp
+   2:  3ffe b0ab 0f00          move 0xfabb0,usp
+   8:  75fa                    move usp,\[r5\]
+   a:  3cfa                    move \[r12\],usp
diff --git a/gas/testsuite/gas/cris/rd-usp-1b.d b/gas/testsuite/gas/cris/rd-usp-1b.d
new file mode 100644 (file)
index 0000000..07fa6c5
--- /dev/null
@@ -0,0 +1,15 @@
+#objdump: -dr
+#as: --march=v32
+#source: v32-err-8.s
+
+# Check that USP gets the right number for V32.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+   0:  3ae6                    move r10,usp
+   2:  3fee b0ab 0f00          move 0xfabb0,usp
+   8:  75ea                    move usp,\[r5\]
+   a:  3cea                    move \[r12\],usp
diff --git a/gas/testsuite/gas/cris/rd-v10_32o-1.d b/gas/testsuite/gas/cris/rd-v10_32o-1.d
new file mode 100644 (file)
index 0000000..d3c8c42
--- /dev/null
@@ -0,0 +1,9 @@
+#source: break.s
+#as: --em=criself --march=common_v10_v32
+#objdump: -p
+
+# Check that different command-line options result in different
+# machine-type stamps on the object files.
+
+.*:     file format elf32-us-cris
+private flags = 5: \[symbols have a _ prefix\] \[v10 and v32\]
diff --git a/gas/testsuite/gas/cris/rd-v10_32o-2.d b/gas/testsuite/gas/cris/rd-v10_32o-2.d
new file mode 100644 (file)
index 0000000..d4b51a9
--- /dev/null
@@ -0,0 +1,53 @@
+#as: --em=criself --march=common_v10_v32
+#objdump: -dr
+
+# Check that branch offsets are computed as for v32.  The
+# compiler is supposed to generate four nop-type insns after
+# every label to make sure the offset-by-2 or 4 doesn't matter.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <a>:
+       0:      ffed ff7f               ba .*
+       4:      0000                    bcc \.\+2
+       \.\.\.
+
+00007fff <b1>:
+    7fff:      ffed 0201               ba .*
+    8003:      fee0                    ba .*
+    8005:      0000                    bcc \.\+2
+       \.\.\.
+
+00008101 <b2>:
+       \.\.\.
+    8201:      01e0                    ba .*
+    8203:      ffed fefe               ba .*
+
+00008207 <b3>:
+       \.\.\.
+   10203:      ffed 0480               ba .*
+
+00010207 <b4>:
+   10207:      b005                    setf 
+
+00010209 <aa>:
+   10209:      ff3d ff7f               beq .*
+   1020d:      0000                    bcc \.\+2
+       \.\.\.
+
+00018208 <bb1>:
+   18208:      ff3d 0201               beq .*
+   1820c:      fe30                    beq .*
+   1820e:      0000                    bcc \.\+2
+       \.\.\.
+
+0001830a <bb2>:
+       \.\.\.
+   1840a:      0130                    beq .*
+   1840c:      ff3d fefe               beq .*
+
+00018410 <bb3>:
+       \.\.\.
+   2040c:      ff3d 0480               beq .*
diff --git a/gas/testsuite/gas/cris/rd-v10_32o-2.s b/gas/testsuite/gas/cris/rd-v10_32o-2.s
new file mode 100644 (file)
index 0000000..a912ae6
--- /dev/null
@@ -0,0 +1,31 @@
+a:
+ ba b1
+ .space 32767-4
+b1:
+ ba b2
+ ba b2
+ .space 127*2-2
+b2:
+ .space 128*2
+ ba b2
+ ba b2
+b3:
+ .space 32764
+ ba b3
+b4:
+ setf
+aa:
+ beq bb1
+ .space 32767-4
+bb1:
+ beq bb2
+ beq bb2
+ .space 127*2-2
+bb2:
+ .space 128*2
+ beq bb2
+ beq bb2
+bb3:
+ .space 32764
+ beq bb3
+bb4:
diff --git a/gas/testsuite/gas/cris/rd-v32-b1.d b/gas/testsuite/gas/cris/rd-v32-b1.d
new file mode 100644 (file)
index 0000000..1b44a87
--- /dev/null
@@ -0,0 +1,31 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <a>:
+       0:      bf0e 0580 0000          ba 8005 <b1>
+       6:      ffed ff7f               ba 8005 <b1>
+       a:      0000                    bcc \.
+       \.\.\.
+
+00008005 <b1>:
+    8005:      ffed 0201               ba 8107 <b2>
+    8009:      fee0                    ba 8107 <b2>
+    800b:      0000                    bcc \.
+       \.\.\.
+
+00008107 <b2>:
+       \.\.\.
+    8207:      01e0                    ba 8107 <b2>
+    8209:      ffed fefe               ba 8107 <b2>
+
+0000820d <b3>:
+       \.\.\.
+   1020d:      ffed 0080               ba 820d <b3>
+   10211:      bf0e fc7f ffff          ba 820d <b3>
+
+00010217 <b4>:
+       \.\.\.
diff --git a/gas/testsuite/gas/cris/rd-v32-b1.s b/gas/testsuite/gas/cris/rd-v32-b1.s
new file mode 100644 (file)
index 0000000..e3a8ba8
--- /dev/null
@@ -0,0 +1,17 @@
+a:
+ ba b1
+ ba b1
+ .space 32767-4
+b1:
+ ba b2
+ ba b2
+ .space 127*2-2
+b2:
+ .space 128*2
+ ba b2
+ ba b2
+b3:
+ .space 32768
+ ba b3
+ ba b3
+b4:
diff --git a/gas/testsuite/gas/cris/rd-v32-b2.d b/gas/testsuite/gas/cris/rd-v32-b2.d
new file mode 100644 (file)
index 0000000..69b8f59
--- /dev/null
@@ -0,0 +1,39 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <a>:
+       0:      0ce0                    ba c <a\+0xc>
+       2:      b005                    nop 
+       4:      bf0e 0980 0000          ba 800d <b1>
+       a:      b005                    nop 
+       c:      f930                    beq 4 <a\+0x4>
+       e:      ff2d ff7f               bne 800d <b1>
+      12:      0000                    bcc \.
+       \.\.\.
+
+0000800d <b1>:
+    800d:      ff0d 0201               bhs 810f <b2>
+    8011:      fe90                    bhi 810f <b2>
+    8013:      0000                    bcc \.
+       \.\.\.
+
+0000810f <b2>:
+       \.\.\.
+    820f:      0110                    bcs 810f <b2>
+    8211:      ff1d fefe               blo 810f <b2>
+
+00008215 <b3>:
+       \.\.\.
+   10215:      ff8d 0080               bls 8215 <b3>
+   10219:      0ce0                    ba 10225 <b3\+0x8010>
+   1021b:      b005                    nop 
+   1021d:      bf0e f87f ffff          ba 8215 <b3>
+   10223:      b005                    nop 
+   10225:      f9f0                    bsb 1021d <b3\+0x8008>
+
+00010227 <b4>:
+       \.\.\.
diff --git a/gas/testsuite/gas/cris/rd-v32-b2.s b/gas/testsuite/gas/cris/rd-v32-b2.s
new file mode 100644 (file)
index 0000000..65b137a
--- /dev/null
@@ -0,0 +1,20 @@
+a:
+ beq b1
+ bne b1
+ .space 32767-4
+b1:
+ bhs b2
+ bhi b2
+ .space 127*2-2
+b2:
+ .space 128*2
+ bcs b2
+ blo b2
+b3:
+ .space 32768
+ bls b3
+ bsb b3
+b4:
+
+
+  
\ No newline at end of file
diff --git a/gas/testsuite/gas/cris/rd-v32-b3.d b/gas/testsuite/gas/cris/rd-v32-b3.d
new file mode 100644 (file)
index 0000000..c8a14ae
--- /dev/null
@@ -0,0 +1,27 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+# Check expansion of "ba" into dword operands for different segment.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <a-0x2>:
+   0:  7fa2                    moveq -1,r10
+
+00000002 <a>:
+   2:  bf0e 0000 0000          ba 2 <a>
+                       4: R_CRIS_32_PCREL      \.text\.2\+0x8
+   8:  4152                    moveq 1,r5
+       \.\.\.
+Disassembly of section \.text\.2:
+
+00000000 <b-0x2>:
+   0:  4822                    moveq 8,r2
+
+00000002 <b>:
+   2:  4232                    moveq 2,r3
+   4:  bf0e 0000 0000          ba 4 <b\+0x2>
+                       6: R_CRIS_32_PCREL      \.text\+0x8
+   a:  4472                    moveq 4,r7
diff --git a/gas/testsuite/gas/cris/rd-v32-b3.s b/gas/testsuite/gas/cris/rd-v32-b3.s
new file mode 100644 (file)
index 0000000..14aa0b5
--- /dev/null
@@ -0,0 +1,11 @@
+ moveq -1,r10
+a:
+ ba b
+ moveq 1,r5
+
+ .section .text.2,"ax"
+ moveq 8,r2
+b:
+ moveq 2,r3
+ ba a
+ moveq 4,r7
diff --git a/gas/testsuite/gas/cris/rd-v32-f1.d b/gas/testsuite/gas/cris/rd-v32-f1.d
new file mode 100644 (file)
index 0000000..e1e225d
--- /dev/null
@@ -0,0 +1,26 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+# Test that v32 flags are properly recognized and emitted at disassembly.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <x>:
+   0:  b105                    setf c
+   2:  f105                    clearf c
+   4:  f205                    clearf v
+   6:  b205                    setf v
+   8:  b405                    setf z
+   a:  f405                    clearf z
+   c:  f805                    clearf n
+   e:  b805                    setf n
+  10:  b015                    ax 
+  12:  f015                    clearf x
+  14:  b025                    ei 
+  16:  f025                    di 
+  18:  f045                    clearf u
+  1a:  b045                    setf u
+  1c:  b085                    setf p
+  1e:  f085                    clearf p
diff --git a/gas/testsuite/gas/cris/rd-v32-f1.s b/gas/testsuite/gas/cris/rd-v32-f1.s
new file mode 100644 (file)
index 0000000..dc5c6cf
--- /dev/null
@@ -0,0 +1,18 @@
+; Test that v32 flags are properly recognized.
+x:
+ setf c
+ clearf C
+ clearf v
+ setf V
+ setf z
+ clearf Z
+ clearf n
+ setf N
+ setf x
+ clearf X
+ setf i
+ clearf I
+ clearf u
+ setf U
+ setf p
+ clearf P
diff --git a/gas/testsuite/gas/cris/rd-v32-i1.d b/gas/testsuite/gas/cris/rd-v32-i1.d
new file mode 100644 (file)
index 0000000..94aaaf3
--- /dev/null
@@ -0,0 +1,19 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+# Test that addc recognizes constant operands.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+0+ <x>:
+   0:  afad ffff ffff          addc 0xffffffff,r10
+   6:  affd 4000 0000          addc 40 <x\+0x40>,acr
+   c:  af5d 0100 0000          addc 1 <x\+0x1>,r5
+  12:  af7d 0000 0000          addc 0 <x>,r7
+                       14: R_CRIS_32   extsym\+0x140
+  18:  af0d 0000 0000          addc 0 <x>,r0
+  1e:  af4d e782 3101          addc 13182e7 <x\+0x13182e7>,r4
+  24:  affd 0f00 0000          addc f <x\+0xf>,acr
+       \.\.\.
diff --git a/gas/testsuite/gas/cris/rd-v32-i1.s b/gas/testsuite/gas/cris/rd-v32-i1.s
new file mode 100644 (file)
index 0000000..008393b
--- /dev/null
@@ -0,0 +1,10 @@
+; Test that addc recognizes constant operands; [pc+]
+x:
+ addc -1,r10
+ addc 0x40,acr
+ addc 1,r5
+ addc extsym+320,r7
+ addc 0,r0
+ addc [pc+],r4
+ .dword 20021991
+ addc 15,acr
diff --git a/gas/testsuite/gas/cris/rd-v32-l1.d b/gas/testsuite/gas/cris/rd-v32-l1.d
new file mode 100644 (file)
index 0000000..d9997d2
--- /dev/null
@@ -0,0 +1,14 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <a>:
+   0:  7f5d 0000 0000          lapc 0 <a>,r5
+                       2: R_CRIS_32_PCREL      \*ABS\*\+0x7
+   6:  7f6d faff ffff          lapc 0 <a>,r6
+   c:  7f7d 0000 0000          lapc c <a\+0xc>,r7
+                       e: R_CRIS_32_PCREL      \*ABS\*\+0xa
+       \.\.\.
diff --git a/gas/testsuite/gas/cris/rd-v32-l1.s b/gas/testsuite/gas/cris/rd-v32-l1.s
new file mode 100644 (file)
index 0000000..db3a325
--- /dev/null
@@ -0,0 +1,4 @@
+a:
+ lapc 1,r5
+ lapc.d a,r6
+ lapc.d 4,r7
diff --git a/gas/testsuite/gas/cris/rd-v32-l3.d b/gas/testsuite/gas/cris/rd-v32-l3.d
new file mode 100644 (file)
index 0000000..dfe6cfb
--- /dev/null
@@ -0,0 +1,14 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+0+ <x>:
+   0:  7259                    lapcq 4 <y>,r5
+   2:  b005                    nop 
+
+0+4 <y>:
+   4:  bfbe fcff ffff          bsr 0 <x>
+   a:  b005                    nop 
diff --git a/gas/testsuite/gas/cris/rd-v32-l3.s b/gas/testsuite/gas/cris/rd-v32-l3.s
new file mode 100644 (file)
index 0000000..e96a85c
--- /dev/null
@@ -0,0 +1,7 @@
+ .arch v32
+x:
+ lapcq y,r5
+ nop
+y:
+ bsr x
+ nop
diff --git a/gas/testsuite/gas/cris/rd-v32-l4.d b/gas/testsuite/gas/cris/rd-v32-l4.d
new file mode 100644 (file)
index 0000000..8facb8a
--- /dev/null
@@ -0,0 +1,61 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+# Test that lapc shrinks to lapcq and that offsets are emitted correctly.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+0+ <a>:
+   0:  70a9                    lapcq 0 <a>,r10
+   2:  71b9                    lapcq 4 <x>,r11
+
+0+4 <x>:
+   4:  72c9                    lapcq 8 <xx>,r12
+   6:  b005                    nop 
+
+0+8 <xx>:
+   8:  73d9                    lapcq e <xxx>,r13
+   a:  b005                    nop 
+   c:  b005                    nop 
+
+0+e <xxx>:
+   e:  b005                    nop 
+
+0+10 <a00>:
+  10:  b005                    nop 
+  12:  7f9d feff ffff          lapc 10 <a00>,r9
+
+0+18 <a0>:
+  18:  7089                    lapcq 18 <a0>,r8
+  1a:  7179                    lapcq 1c <x0>,r7
+
+0+1c <x0>:
+  1c:  7269                    lapcq 20 <xx0>,r6
+  1e:  b005                    nop 
+
+0+20 <xx0>:
+  20:  b005                    nop 
+
+0+22 <a11>:
+  22:  b005                    nop 
+  24:  7fad feff ffff          lapc 22 <a11>,r10
+
+0+2a <a1>:
+  2a:  7fad 0000 0000          lapc 2a <a1>,r10
+  30:  7fbd 0600 0000          lapc 36 <x1>,r11
+
+0+36 <x1>:
+  36:  7fcd 0800 0000          lapc 3e <xx1>,r12
+  3c:  b005                    nop 
+
+0+3e <xx1>:
+  3e:  7fdd 0a00 0000          lapc 48 <xxx1>,r13
+  44:  b005                    nop 
+  46:  b005                    nop 
+
+0+48 <xxx1>:
+  48:  b005                    nop 
+  4a:  7f39                    lapcq 68 <y>,r3
+       \.\.\.
diff --git a/gas/testsuite/gas/cris/rd-v32-l4.s b/gas/testsuite/gas/cris/rd-v32-l4.s
new file mode 100644 (file)
index 0000000..beab427
--- /dev/null
@@ -0,0 +1,42 @@
+a:
+ lapcq a,$r10
+ lapcq x,$r11
+x:
+ lapcq xx,$r12
+ nop
+xx:
+ lapcq xxx,$r13
+ nop
+ nop
+xxx:
+ nop
+a00:
+ nop
+ lapc a00,$r9
+a0:
+ lapc a0,$r8
+ lapc x0,$r7
+x0:
+ lapc xx0,$r6
+ nop
+xx0:
+ nop
+a11:
+ nop
+ lapc.d a11,$r10
+a1:
+ lapc.d a1,$r10
+ lapc.d x1,$r11
+x1:
+ lapc.d xx1,$r12
+ nop
+xx1:
+ lapc.d xxx1,$r13
+ nop
+ nop
+xxx1:
+ nop
+ lapc y,$r3
+ .space 28,0
+y:
+
diff --git a/gas/testsuite/gas/cris/rd-v32o-1.d b/gas/testsuite/gas/cris/rd-v32o-1.d
new file mode 100644 (file)
index 0000000..874b3df
--- /dev/null
@@ -0,0 +1,9 @@
+#source: abs32-1.s
+#as: --em=criself --march=v32
+#objdump: -p
+
+# Check that different command-line options result in different
+# machine-type stamps on the object files.
+
+.*:     file format elf32-us-cris
+private flags = 3: \[symbols have a _ prefix\] \[v32\]
diff --git a/gas/testsuite/gas/cris/rd-v32s-1.d b/gas/testsuite/gas/cris/rd-v32s-1.d
new file mode 100644 (file)
index 0000000..9b38e1e
--- /dev/null
@@ -0,0 +1,148 @@
+#source: v32-err-1.s
+#as: --em=criself --march=v32
+#objdump: -dr
+
+# Check that v32 insns that are expected to give syntax errors
+# for non-v32 are recognized and resulting in correct code and
+# disassembly.
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+00000000 <here>:
+   0:  6f3a                    move\.d \[acr\],r3
+   2:  65fe                    move\.d \[r5\+\],acr
+   4:  6f76                    move\.d acr,r7
+   6:  68f6                    move\.d r8,acr
+   8:  3fb6                    move acr,srp
+   a:  7005                    addc r0,r0
+   c:  7ff5                    addc acr,acr
+   e:  7615                    addc r6,r1
+  10:  a319                    addc \[r3\],r1
+  12:  a009                    addc \[r0\],r0
+  14:  aff9                    addc \[acr\],acr
+  16:  af19                    addc \[acr\],r1
+  18:  a31d                    addc \[r3\+\],r1
+  1a:  5285                    addi r8\.w,r2,acr
+  1c:  4005                    addi r0\.b,r0,acr
+  1e:  6ff5                    addi acr\.d,acr,acr
+  20:  6379                    addo\.d \[r3\],r7,acr
+  22:  6d7d                    addo\.d \[r13\+\],r7,acr
+  24:  63f9                    addo\.d \[r3\],acr,acr
+  26:  4009                    addo\.b \[r0\],r0,acr
+  28:  6ff9                    addo\.d \[acr\],acr,acr
+  2a:  4ffd ffff               addo\.b 0xffff,acr,acr
+  2e:  5ffd ffff               addo\.w 0xffff,acr,acr
+  32:  6ffd ffff ffff          addo\.d 0xffffffff,acr,acr
+  38:  4f3d 0000               addo\.b 0x0,r3,acr
+                       3a: R_CRIS_16   extsym1
+  3c:  5f3d 0000               addo\.w 0x0,r3,acr
+                       3e: R_CRIS_16   extsym2
+  40:  6f3d 0000 0000          addo\.d 0 <here>,r3,acr
+                       42: R_CRIS_32   extsym3
+  46:  4ffd 7f00               addo\.b 0x7f,acr,acr
+  4a:  5ffd ff7f               addo\.w 0x7fff,acr,acr
+  4e:  6ffd ffff ff00          addo\.d ffffff <here\+0xffffff>,acr,acr
+  54:  4ffd 80ff               addo\.b 0xff80,acr,acr
+  58:  5ffd 0080               addo\.w 0x8000,acr,acr
+  5c:  6ffd ffff ffff          addo\.d 0xffffffff,acr,acr
+  62:  7009                    lapcq 62 <here\+0x62>,r0
+  64:  7f49                    lapcq 82 <here\+0x82>,r4
+  66:  7ff9                    lapcq 84 <here\+0x84>,acr
+  68:  7ffd 0000 0000          lapc 68 <here\+0x68>,acr
+                       6a: R_CRIS_32_PCREL     extsym4\+0x6
+  6e:  7f4d 0000 0000          lapc 6e <here\+0x6e>,r4
+                       70: R_CRIS_32_PCREL     extsym5\+0x6
+  74:  7f4d 8cff ffff          lapc 0 <here>,r4
+  7a:  fff1                    addoq -1,acr,acr
+  7c:  0001                    addoq 0,r0,acr
+  7e:  7f41                    addoq 127,r4,acr
+  80:  0041                    addoq 0,r4,acr
+                       80: R_CRIS_8    extsym6
+  82:  bfbe 0000 0000          bsr 82 <here\+0x82>
+                       84: R_CRIS_32_PCREL     \*ABS\*\+0x5
+  88:  bf0e 0000 0000          ba 88 <here\+0x88>
+                       8a: R_CRIS_32_PCREL     extsym7\+0x6
+  8e:  bfae 72ff ffff          bas 0 <here>,erp
+  94:  ffbe 0000 0000          bsrc 94 <here\+0x94>
+                       96: R_CRIS_32_PCREL     \*ABS\*\+0x5
+  9a:  0000                    bcc \.
+  9c:  0000                    bcc \.
+  9e:  ff0e 0000 0000          basc 9e <here\+0x9e>,bz
+                       a0: R_CRIS_32_PCREL     extsym8\+0x6
+  a4:  0000                    bcc \.
+  a6:  0000                    bcc \.
+  a8:  ffae 58ff ffff          basc 0 <here>,erp
+  ae:  0000                    bcc \.
+  b0:  0000                    bcc \.
+  b2:  00f0                    bsb b2 <here\+0xb2>
+  b4:  b005                    nop 
+  b6:  4bf0                    bsb 0 <here>
+  b8:  b005                    nop 
+  ba:  bfbe 0000 0000          bsr ba <here\+0xba>
+                       bc: R_CRIS_32_PCREL     extsym9\+0x6
+  c0:  bfbe 40ff ffff          bsr 0 <here>
+  c6:  ffbe 0000 0000          bsrc c6 <here\+0xc6>
+                       c8: R_CRIS_32_PCREL     \*ABS\*\+0x5
+  cc:  0000                    bcc \.
+  ce:  0000                    bcc \.
+  d0:  ffbe 0000 0000          bsrc d0 <here\+0xd0>
+                       d2: R_CRIS_32_PCREL     extsym10\+0x6
+  d6:  0000                    bcc \.
+  d8:  0000                    bcc \.
+  da:  ffbe 26ff ffff          bsrc 0 <here>
+  e0:  0000                    bcc \.
+  e2:  0000                    bcc \.
+  e4:  b00a                    fidxd \[r0\]
+  e6:  bf0a                    fidxd \[acr\]
+  e8:  300d                    fidxi \[r0\]
+  ea:  3f0d                    fidxi \[acr\]
+  ec:  b01a                    ftagd \[r0\]
+  ee:  bf1a                    ftagd \[acr\]
+  f0:  301d                    ftagi \[r0\]
+  f2:  3f1d                    ftagi \[acr\]
+  f4:  b009                    jump r0
+  f6:  bfe9                    jas acr,usp
+  f8:  bf0d 0000 0000          jump 0 <here>
+                       fa: R_CRIS_32   extsym9
+  fe:  bfbd 0000 0000          jsr 0 <here>
+                       100: R_CRIS_32  \.text
+ 104:  300b                    jasc r0,bz
+ 106:  0000                    bcc \.
+ 108:  0000                    bcc \.
+ 10a:  3feb                    jasc acr,usp
+ 10c:  0000                    bcc \.
+ 10e:  0000                    bcc \.
+ 110:  3fbf ffff ffff          jsrc ffffffff <here\+0xffffffff>
+ 116:  0000                    bcc \.
+ 118:  0000                    bcc \.
+ 11a:  3f0f 0000 0000          jasc 0 <here>,bz
+                       11c: R_CRIS_32  extsym11
+ 120:  0000                    bcc \.
+ 122:  0000                    bcc \.
+ 124:  3faf 0000 0000          jasc 0 <here>,erp
+                       126: R_CRIS_32  \.text
+ 12a:  0000                    bcc \.
+ 12c:  0000                    bcc \.
+ 12e:  f0b9                    ret 
+ 130:  f009                    jump bz
+ 132:  f007                    mcp bz,r0
+ 134:  ff77                    mcp mof,acr
+ 136:  f2b7                    mcp srp,r2
+ 138:  700f                    move s0,r0
+ 13a:  7fff                    move s15,acr
+ 13c:  735f                    move s5,r3
+ 13e:  700b                    move r0,s0
+ 140:  7ffb                    move acr,s15
+ 142:  74ab                    move r4,s10
+ 144:  3029                    rfe 
+ 146:  3049                    rfg 
+ 148:  f0a9                    rete 
+ 14a:  f0c9                    retn 
+ 14c:  30f5                    ssb r0
+ 14e:  3ff5                    ssb acr
+ 150:  3af5                    ssb r10
+ 152:  3039                    sfe 
+ 154:  30f9                    halt 
+ 156:  3059                    rfn 
diff --git a/gas/testsuite/gas/cris/rd-v32s-2.d b/gas/testsuite/gas/cris/rd-v32s-2.d
new file mode 100644 (file)
index 0000000..c6546f1
--- /dev/null
@@ -0,0 +1,16 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+0+ <here>:
+[      ]+0:[   ]+3f1e fafc fdfe[       ]+move fefdfcfa <here\+0xfefdfcfa>,vr
+[      ]+6:[   ]+3f2e 11ba 0ff0[       ]+move f00fba11 <here\+0xf00fba11>,pid
+[      ]+c:[   ]+3f3e 0000 0000[       ]+move 0 <here>,srs
+[      ]+e:[   ]+R_CRIS_32     extsym
+[      ]+12:[  ]+3f4e 0000 0000[       ]+move 0 <here>,wz
+[      ]+14:[  ]+R_CRIS_32     extsym2
+[      ]+18:[  ]+3f5e e903 0000[       ]+move 3e9 <here\+0x3e9>,exs
+[      ]+1e:[  ]+3f6e 6500 0000[       ]+move 65 <here\+0x65>,eda
diff --git a/gas/testsuite/gas/cris/rd-v32s-2.s b/gas/testsuite/gas/cris/rd-v32s-2.s
new file mode 100644 (file)
index 0000000..8aee3a9
--- /dev/null
@@ -0,0 +1,11 @@
+; Check that byte- and word-size special registers on CRISv32
+; take 32-bit immediate operands, as opposed to pre-v32 CRIS.
+
+ .text
+here:
+ move 0xfefdfcfa,$vr
+ move 0xf00fba11,$pid
+ move extsym,$srs
+ move extsym2,$wz
+ move 1001,$exs
+ move 101,$eda
diff --git a/gas/testsuite/gas/cris/rd-v32s-3.d b/gas/testsuite/gas/cris/rd-v32s-3.d
new file mode 100644 (file)
index 0000000..8ad5e84
--- /dev/null
@@ -0,0 +1,14 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+.*:     file format elf32-us-cris
+
+Disassembly of section \.text:
+
+0+ <here>:
+[      ]+0:[   ]+3316[         ]+move r3,vr
+[      ]+2:[   ]+3526[         ]+move r5,pid
+[      ]+4:[   ]+3636[         ]+move r6,srs
+[      ]+6:[   ]+3746[         ]+move r7,wz
+[      ]+8:[   ]+3856[         ]+move r8,exs
+[      ]+a:[   ]+3966[         ]+move r9,eda
diff --git a/gas/testsuite/gas/cris/rd-v32s-3.s b/gas/testsuite/gas/cris/rd-v32s-3.s
new file mode 100644 (file)
index 0000000..cd6022a
--- /dev/null
@@ -0,0 +1,10 @@
+; Check correct disassembly of special registers.
+
+ .text
+here:
+ move $r3,$vr
+ move $r5,$pid
+ move $r6,$srs
+ move $r7,$wz
+ move $r8,$exs
+ move $r9,$eda
diff --git a/gas/testsuite/gas/cris/rd-v32s-4.d b/gas/testsuite/gas/cris/rd-v32s-4.d
new file mode 100644 (file)
index 0000000..21bcf31
--- /dev/null
@@ -0,0 +1,88 @@
+#as: --em=criself --march=v32
+#objdump: -dr
+
+.*:     file format elf32-us-cris
+
+Disassembly of section .text:
+
+0+ <here>:
+[      ]+0:[   ]+3306[         ]+move r3,bz
+[      ]+2:[   ]+3516[         ]+move r5,vr
+[      ]+4:[   ]+3626[         ]+move r6,pid
+[      ]+6:[   ]+3736[         ]+move r7,srs
+[      ]+8:[   ]+3846[         ]+move r8,wz
+[      ]+a:[   ]+3956[         ]+move r9,exs
+[      ]+c:[   ]+3566[         ]+move r5,eda
+[      ]+e:[   ]+3676[         ]+move r6,mof
+[      ]+10:[  ]+3786[         ]+move r7,dz
+[      ]+12:[  ]+3296[         ]+move r2,ebp
+[      ]+14:[  ]+34a6[         ]+move r4,erp
+[      ]+16:[  ]+30b6[         ]+move r0,srp
+[      ]+18:[  ]+36c6[         ]+move r6,nrp
+[      ]+1a:[  ]+3ad6[         ]+move r10,ccs
+[      ]+1c:[  ]+3ce6[         ]+move r12,usp
+[      ]+1e:[  ]+3df6[         ]+move r13,spc
+[      ]+20:[  ]+7306[         ]+clear\.b r3
+[      ]+22:[  ]+7516[         ]+move vr,r5
+[      ]+24:[  ]+7626[         ]+move pid,r6
+[      ]+26:[  ]+7736[         ]+move srs,r7
+[      ]+28:[  ]+7846[         ]+clear\.w r8
+[      ]+2a:[  ]+7956[         ]+move exs,r9
+[      ]+2c:[  ]+7566[         ]+move eda,r5
+[      ]+2e:[  ]+7676[         ]+move mof,r6
+[      ]+30:[  ]+7786[         ]+clear\.d r7
+[      ]+32:[  ]+7296[         ]+move ebp,r2
+[      ]+34:[  ]+74a6[         ]+move erp,r4
+[      ]+36:[  ]+70b6[         ]+move srp,r0
+[      ]+38:[  ]+76c6[         ]+move nrp,r6
+[      ]+3a:[  ]+7ad6[         ]+move ccs,r10
+[      ]+3c:[  ]+7ce6[         ]+move usp,r12
+[      ]+3e:[  ]+7df6[         ]+move spc,r13
+[      ]+40:[  ]+3f0e 0300 0000[       ]+move 3 <here\+0x3>,bz
+[      ]+46:[  ]+3f1e 0500 0000[       ]+move 5 <here\+0x5>,vr
+[      ]+4c:[  ]+3f2e 0600 0000[       ]+move 6 <here\+0x6>,pid
+[      ]+52:[  ]+3f3e 0700 0000[       ]+move 7 <here\+0x7>,srs
+[      ]+58:[  ]+3f4e 0800 0000[       ]+move 8 <here\+0x8>,wz
+[      ]+5e:[  ]+3f5e 0900 0000[       ]+move 9 <here\+0x9>,exs
+[      ]+64:[  ]+3f6e 0a00 0000[       ]+move a <here\+0xa>,eda
+[      ]+6a:[  ]+3f7e 6500 0000[       ]+move 65 <here\+0x65>,mof
+[      ]+70:[  ]+3f8e 7800 0000[       ]+move 78 <here\+0x78>,dz
+[      ]+76:[  ]+3f9e 0d00 0000[       ]+move d <here\+0xd>,ebp
+[      ]+7c:[  ]+3fae 0400 0000[       ]+move 4 <here\+0x4>,erp
+[      ]+82:[  ]+3fbe 0000 0000[       ]+move 0 <here>,srp
+[      ]+88:[  ]+3fce 0600 0000[       ]+move 6 <here\+0x6>,nrp
+[      ]+8e:[  ]+3fde 0a00 0000[       ]+move a <here\+0xa>,ccs
+[      ]+94:[  ]+3fee 0c00 0000[       ]+move c <here\+0xc>,usp
+[      ]+9a:[  ]+3ffe 0d00 0000[       ]+move d <here\+0xd>,spc
+[      ]+a0:[  ]+730a[         ]+clear\.b \[r3\]
+[      ]+a2:[  ]+751a[         ]+move vr,\[r5\]
+[      ]+a4:[  ]+762a[         ]+move pid,\[r6\]
+[      ]+a6:[  ]+773a[         ]+move srs,\[r7\]
+[      ]+a8:[  ]+784a[         ]+clear\.w \[r8\]
+[      ]+aa:[  ]+795a[         ]+move exs,\[r9\]
+[      ]+ac:[  ]+756a[         ]+move eda,\[r5\]
+[      ]+ae:[  ]+767a[         ]+move mof,\[r6\]
+[      ]+b0:[  ]+778a[         ]+clear\.d \[r7\]
+[      ]+b2:[  ]+729a[         ]+move ebp,\[r2\]
+[      ]+b4:[  ]+74aa[         ]+move erp,\[r4\]
+[      ]+b6:[  ]+70ba[         ]+move srp,\[r0\]
+[      ]+b8:[  ]+76ca[         ]+move nrp,\[r6\]
+[      ]+ba:[  ]+7ada[         ]+move ccs,\[r10\]
+[      ]+bc:[  ]+7cea[         ]+move usp,\[r12\]
+[      ]+be:[  ]+7dfa[         ]+move spc,\[r13\]
+[      ]+c0:[  ]+330a[         ]+move \[r3\],bz
+[      ]+c2:[  ]+351a[         ]+move \[r5\],vr
+[      ]+c4:[  ]+362a[         ]+move \[r6\],pid
+[      ]+c6:[  ]+373a[         ]+move \[r7\],srs
+[      ]+c8:[  ]+384a[         ]+move \[r8\],wz
+[      ]+ca:[  ]+395a[         ]+move \[r9\],exs
+[      ]+cc:[  ]+356a[         ]+move \[r5\],eda
+[      ]+ce:[  ]+367a[         ]+move \[r6\],mof
+[      ]+d0:[  ]+378a[         ]+move \[r7\],dz
+[      ]+d2:[  ]+329a[         ]+move \[r2\],ebp
+[      ]+d4:[  ]+34aa[         ]+move \[r4\],erp
+[      ]+d6:[  ]+30ba[         ]+move \[r0\],srp
+[      ]+d8:[  ]+36ca[         ]+move \[r6\],nrp
+[      ]+da:[  ]+3ada[         ]+move \[r10\],ccs
+[      ]+dc:[  ]+3cea[         ]+move \[r12\],usp
+[      ]+de:[  ]+3dfa[         ]+move \[r13\],spc
diff --git a/gas/testsuite/gas/cris/rd-v32s-4.s b/gas/testsuite/gas/cris/rd-v32s-4.s
new file mode 100644 (file)
index 0000000..4b3c46d
--- /dev/null
@@ -0,0 +1,88 @@
+; Check special registers specified as pN.
+
+ .text
+here:
+ move $r3,$p0
+ move $r5,$p1
+ move $r6,$p2
+ move $r7,$p3
+ move $r8,$p4
+ move $r9,$p5
+ move $r5,$p6
+ move $r6,$p7
+ move $r7,$p8
+ move $r2,$p9
+ move $r4,$p10
+ move $r0,$p11
+ move $r6,$p12
+ move $r10,$p13
+ move $r12,$p14
+ move $r13,$p15
+
+ move $p0,$r3
+ move $p1,$r5
+ move $p2,$r6
+ move $p3,$r7
+ move $p4,$r8
+ move $p5,$r9
+ move $p6,$r5
+ move $p7,$r6
+ move $p8,$r7
+ move $p9,$r2
+ move $p10,$r4
+ move $p11,$r0
+ move $p12,$r6
+ move $p13,$r10
+ move $p14,$r12
+ move $p15,$r13
+
+ move 3,$p0
+ move 5,$p1
+ move 6,$p2
+ move 7,$p3
+ move 8,$p4
+ move 9,$p5
+ move 10,$p6
+ move 101,$p7
+ move 120,$p8
+ move 13,$p9
+ move 4,$p10
+ move 0,$p11
+ move 6,$p12
+ move 10,$p13
+ move 12,$p14
+ move 13,$p15
+
+ move $p0,[$r3]
+ move $p1,[$r5]
+ move $p2,[$r6]
+ move $p3,[$r7]
+ move $p4,[$r8]
+ move $p5,[$r9]
+ move $p6,[$r5]
+ move $p7,[$r6]
+ move $p8,[$r7]
+ move $p9,[$r2]
+ move $p10,[$r4]
+ move $p11,[$r0]
+ move $p12,[$r6]
+ move $p13,[$r10]
+ move $p14,[$r12]
+ move $p15,[$r13]
+
+ move [$r3],$p0
+ move [$r5],$p1
+ move [$r6],$p2
+ move [$r7],$p3
+ move [$r8],$p4
+ move [$r9],$p5
+ move [$r5],$p6
+ move [$r6],$p7
+ move [$r7],$p8
+ move [$r2],$p9
+ move [$r4],$p10
+ move [$r0],$p11
+ move [$r6],$p12
+ move [$r10],$p13
+ move [$r12],$p14
+ move [$r13],$p15
diff --git a/gas/testsuite/gas/cris/rd-vao-1.d b/gas/testsuite/gas/cris/rd-vao-1.d
new file mode 100644 (file)
index 0000000..4e9cd93
--- /dev/null
@@ -0,0 +1,11 @@
+#source: abs32-1.s
+#as: --em=criself --march=v0_v10
+#objdump: -p
+
+# Check that different command-line options result in different
+# machine-type stamps on the object files.  The source file
+# isn't important, as long the code assembles for the machine we
+# specify.
+
+.*:     file format elf32-us-cris
+private flags = 1: \[symbols have a _ prefix\]
diff --git a/gas/testsuite/gas/cris/v32-err-1.s b/gas/testsuite/gas/cris/v32-err-1.s
new file mode 100644 (file)
index 0000000..220caf4
--- /dev/null
@@ -0,0 +1,117 @@
+; { dg-do assemble }
+; { dg-options "--march=v0_v10" }
+
+; Check that valid v32-specific mnemonics and operands are not
+; recognized for v10.  (Also used elsewhere to check that valid
+; v32-specific insns and operands are recognized at assembly and
+; disassembly for v32.)
+
+ .text
+here:
+ move.d [$acr],$r3             ; No error - $acr treated as a symbol.
+ move.d [$r5+],$acr            ; { dg-error "(Illegal|Invalid) operands" }
+ move.d $acr,$r7               ; No error - $acr treated as a symbol.
+ move.d $r8,$acr               ; { dg-error "(Illegal|Invalid) operands" }
+ move $acr,$srp                        ; No error - $acr treated as a symbol.
+ addc $r0,$r0                  ; { dg-error "Unknown opcode" }
+ addc $acr,$acr                        ; { dg-error "Unknown opcode" }
+ addc $r6,$r1                  ; { dg-error "Unknown opcode" }
+ addc [$r3],$r1                        ; { dg-error "Unknown opcode" }
+ addc [$r0],$r0                        ; { dg-error "Unknown opcode" }
+ addc [$acr],$acr              ; { dg-error "Unknown opcode" }
+ addc [$acr],$r1               ; { dg-error "Unknown opcode" }
+ addc [$r3+],$r1               ; { dg-error "Unknown opcode" }
+ addi $r8.w,$r2,$acr           ; { dg-error "(Illegal|Invalid) operands" }
+ addi $r0.b,$r0,$acr           ; { dg-error "(Illegal|Invalid) operands" }
+ addi $acr.d,$acr,$acr         ; { dg-error "(Illegal|Invalid) operands" }
+ addo.d [$r3],$r7,$acr         ; { dg-error "Unknown opcode" }
+ addo.d [$r13+],$r7,$acr       ; { dg-error "Unknown opcode" }
+ addo.d [$r3],$acr,$acr                ; { dg-error "Unknown opcode" }
+ addo.b [$r0],$r0,$acr         ; { dg-error "Unknown opcode" }
+ addo.d [$acr],$acr,$acr       ; { dg-error "Unknown opcode" }
+ addo.b -1,$acr,$acr           ; { dg-error "Unknown opcode" }
+ addo.w -1,$acr,$acr           ; { dg-error "Unknown opcode" }
+ addo.d -1,$acr,$acr           ; { dg-error "Unknown opcode" }
+ addo.b extsym1,$r3,$acr       ; { dg-error "Unknown opcode" }
+ addo.w extsym2,$r3,$acr       ; { dg-error "Unknown opcode" }
+ addo.d extsym3,$r3,$acr       ; { dg-error "Unknown opcode" }
+ addo.b 127,$acr,$acr          ; { dg-error "Unknown opcode" }
+ addo.w 32767,$acr,$acr                ; { dg-error "Unknown opcode" }
+ addo.d 0xffffff,$acr,$acr     ; { dg-error "Unknown opcode" }
+ addo.b -128,$acr,$acr         ; { dg-error "Unknown opcode" }
+ addo.w -32768,$acr,$acr       ; { dg-error "Unknown opcode" }
+ addo.d 0xffffffff,$acr,$acr   ; { dg-error "Unknown opcode" }
+ lapc .,$r0                    ; { dg-error "Unknown opcode" }
+ lapc .+30,$r4                 ; { dg-error "Unknown opcode" }
+ lapc .+30,$acr                        ; { dg-error "Unknown opcode" }
+ lapc extsym4,$acr             ; { dg-error "Unknown opcode" }
+ lapc extsym5,$r4              ; { dg-error "Unknown opcode" }
+ lapc here,$r4                 ; { dg-error "Unknown opcode" }
+ addoq -1,$acr,$acr            ; { dg-error "Unknown opcode" }
+ addoq 0,$r0,$acr              ; { dg-error "Unknown opcode" }
+ addoq 127,$r4,$acr            ; { dg-error "Unknown opcode" }
+ addoq extsym6,$r4,$acr                ; { dg-error "Unknown opcode" }
+ bas 0xffffffff,$srp           ; { dg-error "Unknown opcode" }
+ bas extsym7,$bz               ; { dg-error "Unknown opcode" }
+ bas here,$erp                 ; { dg-error "Unknown opcode" }
+ basc 0xffffffff,$srp          ; { dg-error "Unknown opcode" }
+ .dword 0
+ basc extsym8,$bz              ; { dg-error "Unknown opcode" }
+ .dword 0
+ basc here,$erp                        ; { dg-error "Unknown opcode" }
+ .dword 0
+ bsb .                         ; { dg-error "Unknown opcode" }
+ nop
+ bsb here                      ; { dg-error "Unknown opcode" }
+ nop
+ bsr extsym9                   ; { dg-error "Unknown opcode" }
+ bsr here                      ; { dg-error "Unknown opcode" }
+ bsrc 0xffffffff               ; { dg-error "Unknown opcode" }
+ .dword 0
+ bsrc extsym10                 ; { dg-error "Unknown opcode" }
+ .dword 0
+ bsrc here                     ; { dg-error "Unknown opcode" }
+ .dword 0
+ fidxd [$r0]                   ; { dg-error "Unknown opcode" }
+ fidxd [$acr]                  ; { dg-error "Unknown opcode" }
+ fidxi [$r0]                   ; { dg-error "Unknown opcode" }
+ fidxi [$acr]                  ; { dg-error "Unknown opcode" }
+ ftagd [$r0]                   ; { dg-error "Unknown opcode" }
+ ftagd [$acr]                  ; { dg-error "Unknown opcode" }
+ ftagi [$r0]                   ; { dg-error "Unknown opcode" }
+ ftagi [$acr]                  ; { dg-error "Unknown opcode" }
+ jas $r0,$bz                   ; { dg-error "Unknown opcode" }
+ jas $acr,$usp                 ; { dg-error "Unknown opcode" }
+ jas extsym9,$bz               ; { dg-error "Unknown opcode" }
+ jas here,$srp                 ; { dg-error "Unknown opcode" }
+ jasc $r0,$bz                  ; { dg-error "Unknown opcode" }
+ .dword 0
+ jasc $acr,$usp                        ; { dg-error "Unknown opcode" }
+ .dword 0
+ jasc 0xffffffff,$srp          ; { dg-error "Unknown opcode" }
+ .dword 0
+ jasc extsym11,$bz             ; { dg-error "Unknown opcode" }
+ .dword 0
+ jasc here,$erp                        ; { dg-error "Unknown opcode" }
+ .dword 0
+ jump $srp                     ; No error - $srp treated as a symbol.
+ jump $bz                      ; No error - $bz treated as a symbol.
+ mcp $p0,$r0                   ; { dg-error "Unknown opcode" }
+ mcp $mof,$acr                 ; { dg-error "Unknown opcode" }
+ mcp $srp,$r2                  ; { dg-error "Unknown opcode" }
+ move $s0,$r0                  ; { dg-error "(Illegal|Invalid) operands" }
+ move $s15,$acr                        ; { dg-error "(Illegal|Invalid) operands" }
+ move $s5,$r3                  ; { dg-error "(Illegal|Invalid) operands" }
+ move $r0,$s0                  ; { dg-error "(Illegal|Invalid) operands" }
+ move $acr,$s15                        ; { dg-error "(Illegal|Invalid) operands" }
+ move $r4,$s10                 ; { dg-error "(Illegal|Invalid) operands" }
+ rfe                           ; { dg-error "Unknown opcode" }
+ rfg                           ; { dg-error "Unknown opcode" }
+ rete                          ; { dg-error "Unknown opcode" }
+ retn                          ; { dg-error "Unknown opcode" }
+ ssb $r0                       ; { dg-error "Unknown opcode" }
+ ssb $acr                      ; { dg-error "Unknown opcode" }
+ ssb $r10                      ; { dg-error "Unknown opcode" }
+ sfe                           ; { dg-error "Unknown opcode" }
+ halt                          ; { dg-error "Unknown opcode" }
+ rfn                           ; { dg-error "Unknown opcode" }
diff --git a/gas/testsuite/gas/cris/v32-err-10.s b/gas/testsuite/gas/cris/v32-err-10.s
new file mode 100644 (file)
index 0000000..dda3c69
--- /dev/null
@@ -0,0 +1,19 @@
+; { dg-do assemble }
+; { dg-options "--march=v32" }
+
+; Check that explicit contants out-of-range for addo are
+; identified.  We don't check addoq here, since that range check
+; is done at a later stage which isn't entered if there were
+; errors.
+
+ .text
+here:
+ addo.b 133,$r0,$acr                   ; { dg-error "not in 8 bit signed range" }
+ addo.b 128,$r0,$acr                   ; { dg-error "not in 8 bit signed range" }
+ addo.b -129,$r0,$acr                  ; { dg-error "not in 8 bit signed range" }
+ addo.b 127,$r0,$acr
+ addo.b -128,$r0,$acr
+ addo.w 32768,$r0,$acr                 ; { dg-error "not in 16 bit signed range" }
+ addo.w -32769,$r0,$acr                        ; { dg-error "not in 16 bit signed range" }
+ addo.w 32767,$r0,$acr
+ addo.w -32768,$r0,$acr
diff --git a/gas/testsuite/gas/cris/v32-err-11.s b/gas/testsuite/gas/cris/v32-err-11.s
new file mode 100644 (file)
index 0000000..70fe8e8
--- /dev/null
@@ -0,0 +1,13 @@
+; { dg-do assemble }
+; { dg-options "--march=v32" }
+
+; Check that explicit contants out-of-range for addoq are
+; identified.  See also v32-err-10.s.
+
+ .text
+here:
+ addoq 133,$r0,$acr                    ; { dg-error "not in 8 bit signed range" }
+ addoq 128,$r0,$acr                    ; { dg-error "not in 8 bit signed range" }
+ addoq -129,$r0,$acr                   ; { dg-error "not in 8 bit signed range" }
+ addoq 127,$r0,$acr
+ addoq -128,$r0,$acr
diff --git a/gas/testsuite/gas/cris/v32-err-2.s b/gas/testsuite/gas/cris/v32-err-2.s
new file mode 100644 (file)
index 0000000..4139d35
--- /dev/null
@@ -0,0 +1,14 @@
+; { dg-do assemble }
+; { dg-options "--march=common_v10_v32 --em=criself" }
+; { dg-error ".word offset handling is not implemented" "err for broken .word" { target cris-*-* } 0 }
+
+; Tests that broken words don't crash, just give a message when
+; in compatibility mode.
+
+sym2:  moveq 0,r0
+       .word   sym1 - sym2
+       moveq 1,r0
+       moveq 2,r0
+       .space  32766, 0
+sym1:  moveq 3,r0
+
diff --git a/gas/testsuite/gas/cris/v32-err-3.s b/gas/testsuite/gas/cris/v32-err-3.s
new file mode 100644 (file)
index 0000000..0cbfda0
--- /dev/null
@@ -0,0 +1,10 @@
+; Error for flags not applicable to current arch.
+; #1: Error for pre-v32 flags for v32.
+; { dg-do assemble }
+; { dg-options "--march=v32" }
+
+y:
+ clearf d      ; { dg-error "(Illegal|Invalid) operands" }
+ setf D                ; { dg-error "(Illegal|Invalid) operands" }
+ setf m                ; { dg-error "(Illegal|Invalid) operands" }
+ clearf M      ; { dg-error "(Illegal|Invalid) operands" }
diff --git a/gas/testsuite/gas/cris/v32-err-4.s b/gas/testsuite/gas/cris/v32-err-4.s
new file mode 100644 (file)
index 0000000..547e159
--- /dev/null
@@ -0,0 +1,18 @@
+; Error for flags not applicable to current arch.
+; #2: Error for v32 flags for pre-v32.
+; { dg-do assemble }
+; { dg-options "--march=v0_v10" }
+
+y:
+ clearf p      ; { dg-error "(Illegal|Invalid) operands" }
+ setf P                ; { dg-error "(Illegal|Invalid) operands" }
+ setf u                ; { dg-error "(Illegal|Invalid) operands" }
+ clearf U      ; { dg-error "(Illegal|Invalid) operands" }
+ clearf d
+ setf D
+ clearf e
+ setf E
+ clearf b
+ setf B
+ setf m
+ clearf M
diff --git a/gas/testsuite/gas/cris/v32-err-5.s b/gas/testsuite/gas/cris/v32-err-5.s
new file mode 100644 (file)
index 0000000..bf1f832
--- /dev/null
@@ -0,0 +1,24 @@
+; Error for flags not applicable to current arch.
+; #3: Error for non-common flags for v10+v32.
+; { dg-do assemble }
+; { dg-options "--march=common_v10_v32" }
+
+y:
+ clearf p      ; { dg-error "(Illegal|Invalid) operands" }
+ setf P                ; { dg-error "(Illegal|Invalid) operands" }
+ setf u                ; { dg-error "(Illegal|Invalid) operands" }
+ clearf U      ; { dg-error "(Illegal|Invalid) operands" }
+ clearf d      ; { dg-error "(Illegal|Invalid) operands" }
+ setf D                ; { dg-error "(Illegal|Invalid) operands" }
+ setf z
+ setf X
+ clearf c
+ clearf V
+ setf n
+ clearf i
+ clearf e      ; { dg-error "(Illegal|Invalid) operands" }
+ setf E                ; { dg-error "(Illegal|Invalid) operands" }
+ clearf b      ; { dg-error "(Illegal|Invalid) operands" }
+ setf B                ; { dg-error "(Illegal|Invalid) operands" }
+ setf m                ; { dg-error "(Illegal|Invalid) operands" }
+ clearf M      ; { dg-error "(Illegal|Invalid) operands" }
diff --git a/gas/testsuite/gas/cris/v32-err-6.s b/gas/testsuite/gas/cris/v32-err-6.s
new file mode 100644 (file)
index 0000000..21b1472
--- /dev/null
@@ -0,0 +1,18 @@
+; Error for flags not applicable to current arch.
+; #4: Error for v32 and pre-v10 flags for v10.
+; { dg-do assemble }
+; { dg-options "--march=v10" }
+
+y:
+ clearf p      ; { dg-error "(Illegal|Invalid) operands" }
+ setf P                ; { dg-error "(Illegal|Invalid) operands" }
+ setf u                ; { dg-error "(Illegal|Invalid) operands" }
+ clearf U      ; { dg-error "(Illegal|Invalid) operands" }
+ clearf d      ; { dg-error "(Illegal|Invalid) operands" }
+ setf D                ; { dg-error "(Illegal|Invalid) operands" }
+ clearf e      ; { dg-error "(Illegal|Invalid) operands" }
+ setf E                ; { dg-error "(Illegal|Invalid) operands" }
+ clearf b
+ setf B
+ setf m
+ clearf M
diff --git a/gas/testsuite/gas/cris/v32-err-7.s b/gas/testsuite/gas/cris/v32-err-7.s
new file mode 100644 (file)
index 0000000..572ff20
--- /dev/null
@@ -0,0 +1,10 @@
+; Error for lapcq out-of-range.
+; { dg-do assemble }
+; { dg-options "--march=v32" }
+
+a:
+ nop
+ lapcq a,$r10  ; { dg-error "not in 4.bit unsigned range" }
+ lapcq x,$r11  ; { dg-error "not in 4.bit unsigned range" }
+ .space 30
+x:
diff --git a/gas/testsuite/gas/cris/v32-err-8.s b/gas/testsuite/gas/cris/v32-err-8.s
new file mode 100644 (file)
index 0000000..105173b
--- /dev/null
@@ -0,0 +1,9 @@
+; { dg-do assemble }
+; { dg-options "--march=common_v10_v32" }
+
+; USP does not have the same register number in v10 as in v32.
+
+ move $r10,$usp                        ; { dg-error "(Illegal|Invalid) operands" }
+ move 0xfabb0,$usp             ; { dg-error "(Illegal|Invalid) operands" }
+ move $usp,[$r5]               ; { dg-error "(Illegal|Invalid) operands" }
+ move [$r12],$usp              ; { dg-error "(Illegal|Invalid) operands" }
diff --git a/gas/testsuite/gas/cris/v32-err-9.s b/gas/testsuite/gas/cris/v32-err-9.s
new file mode 100644 (file)
index 0000000..dadea75
--- /dev/null
@@ -0,0 +1,8 @@
+; { dg-do assemble }
+; { dg-options "--march=v32" }
+
+; "Test.m R" doesn't exist.
+
+ test.d $r10                   ; { dg-error "(Illegal|Invalid) operands" }
+ test.w $r0                    ; { dg-error "(Illegal|Invalid) operands" }
+ test.b $acr                   ; { dg-error "(Illegal|Invalid) operands" }
index 933725d..d1325ec 100644 (file)
@@ -21,7 +21,7 @@ proc dotest {} {
     # float encoding is tested in c54x-specific tests.
     # No floating point support in assembly code for CRIS.
     setup_xfail "arc*-*-*" "cris-*-*" "*c30*-*-*" "*c54x*-*-*" "*c80*-*-*"
-    setup_xfail "vax*-*-*"
+    setup_xfail "vax*-*-*" "crisv32-*-*"
 
     if !$x then { fail "$testname (listing didn't match)" }
 }
index 83dc4cf..46e5284 100644 (file)
@@ -31,7 +31,7 @@ case $target_triplet in {
 
 if { ![istarget hppa*-*-*] || [istarget *-*-linux*] } {
     # FIXME: Due to macro mishandling of ONLY_STANDARD_ESCAPES.
-    setup_xfail "avr-*" "cris-*"
+    setup_xfail "avr-*" "cris-*" "crisv32-*"
 
     # These fail due to NO_STRING_ESCAPES
     setup_xfail "powerpc*-*-aix*" "powerpc*-*-beos*" "powerpc*-*-macos*"