selftests: KVM: Test OS lock behavior

KVM now correctly handles the OS Lock for its guests. When set, KVM
blocks all debug exceptions originating from the guest. Add test cases
to the debug-exceptions test to assert that software breakpoint,
hardware breakpoint, watchpoint, and single-step exceptions are in fact
blocked.

Signed-off-by: Oliver Upton <oupton@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220203174159.2887882-7-oupton@google.com

diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
index ea189d8..63b2178 100644 (file)
--- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
+++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
@@ -23,7 +23,7 @@
 #define SPSR_D         (1 << 9)
 #define SPSR_SS                (1 << 21)
 
-extern unsigned char sw_bp, hw_bp, bp_svc, bp_brk, hw_wp, ss_start;
+extern unsigned char sw_bp, sw_bp2, hw_bp, hw_bp2, bp_svc, bp_brk, hw_wp, ss_start;
 static volatile uint64_t sw_bp_addr, hw_bp_addr;
 static volatile uint64_t wp_addr, wp_data_addr;
 static volatile uint64_t svc_addr;
@@ -47,6 +47,14 @@ static void reset_debug_state(void)
        isb();
 }
 
+static void enable_os_lock(void)
+{
+       write_sysreg(1, oslar_el1);
+       isb();
+
+       GUEST_ASSERT(read_sysreg(oslsr_el1) & 2);
+}
+
 static void install_wp(uint64_t addr)
 {
        uint32_t wcr;
@@ -99,6 +107,7 @@ static void guest_code(void)
        GUEST_SYNC(0);
 
        /* Software-breakpoint */
+       reset_debug_state();
        asm volatile("sw_bp: brk #0");
        GUEST_ASSERT_EQ(sw_bp_addr, PC(sw_bp));
 
@@ -152,6 +161,51 @@ static void guest_code(void)
        GUEST_ASSERT_EQ(ss_addr[1], PC(ss_start) + 4);
        GUEST_ASSERT_EQ(ss_addr[2], PC(ss_start) + 8);
 
+       GUEST_SYNC(6);
+
+       /* OS Lock does not block software-breakpoint */
+       reset_debug_state();
+       enable_os_lock();
+       sw_bp_addr = 0;
+       asm volatile("sw_bp2: brk #0");
+       GUEST_ASSERT_EQ(sw_bp_addr, PC(sw_bp2));
+
+       GUEST_SYNC(7);
+
+       /* OS Lock blocking hardware-breakpoint */
+       reset_debug_state();
+       enable_os_lock();
+       install_hw_bp(PC(hw_bp2));
+       hw_bp_addr = 0;
+       asm volatile("hw_bp2: nop");
+       GUEST_ASSERT_EQ(hw_bp_addr, 0);
+
+       GUEST_SYNC(8);
+
+       /* OS Lock blocking watchpoint */
+       reset_debug_state();
+       enable_os_lock();
+       write_data = '\0';
+       wp_data_addr = 0;
+       install_wp(PC(write_data));
+       write_data = 'x';
+       GUEST_ASSERT_EQ(write_data, 'x');
+       GUEST_ASSERT_EQ(wp_data_addr, 0);
+
+       GUEST_SYNC(9);
+
+       /* OS Lock blocking single-step */
+       reset_debug_state();
+       enable_os_lock();
+       ss_addr[0] = 0;
+       install_ss();
+       ss_idx = 0;
+       asm volatile("mrs x0, esr_el1\n\t"
+                    "add x0, x0, #1\n\t"
+                    "msr daifset, #8\n\t"
+                    : : : "x0");
+       GUEST_ASSERT_EQ(ss_addr[0], 0);
+
        GUEST_DONE();
 }
 
@@ -223,7 +277,7 @@ int main(int argc, char *argv[])
        vm_install_sync_handler(vm, VECTOR_SYNC_CURRENT,
                                ESR_EC_SVC64, guest_svc_handler);
 
-       for (stage = 0; stage < 7; stage++) {
+       for (stage = 0; stage < 11; stage++) {
                vcpu_run(vm, VCPU_ID);
 
                switch (get_ucall(vm, VCPU_ID, &uc)) {