ARM: dts: omap5-uevm: fix mcspi node pin descriptions
authorEric Witcher <ewitcher@mindspring.com>
Fri, 18 Oct 2013 06:42:34 +0000 (02:42 -0400)
committerBenoit Cousson <bcousson@baylibre.com>
Tue, 22 Oct 2013 14:53:01 +0000 (16:53 +0200)
Correct mcspi pin descriptions to match corresponding node name and
add chip select number to be consistent with OMAP5 TRM.

Signed-off-by: Eric Witcher <ewitcher@mindspring.com>
Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
arch/arm/boot/dts/omap5-uevm.dts

index e06a04a..8d80305 100644 (file)
                        0xbc (PIN_INPUT | MUX_MODE0)            /*  mcspi2_clk */
                        0xbe (PIN_INPUT | MUX_MODE0)            /*  mcspi2_simo */
                        0xc0 (PIN_INPUT_PULLUP | MUX_MODE0)     /*  mcspi2_somi */
-                       0xc2 (PIN_OUTPUT | MUX_MODE0)           /*  mcspi2_cs */
+                       0xc2 (PIN_OUTPUT | MUX_MODE0)           /*  mcspi2_cs0 */
                >;
        };
 
        mcspi3_pins: pinmux_mcspi3_pins {
                pinctrl-single,pins = <
-                       0x78 (PIN_INPUT | MUX_MODE1)            /*  mcspi2_somi */
-                       0x7a (PIN_INPUT | MUX_MODE1)            /*  mcspi2_cs */
-                       0x7c (PIN_INPUT | MUX_MODE1)            /*  mcspi2_simo */
-                       0x7e (PIN_INPUT | MUX_MODE1)            /*  mcspi2_clk */
+                       0x78 (PIN_INPUT | MUX_MODE1)            /*  mcspi3_somi */
+                       0x7a (PIN_INPUT | MUX_MODE1)            /*  mcspi3_cs0 */
+                       0x7c (PIN_INPUT | MUX_MODE1)            /*  mcspi3_simo */
+                       0x7e (PIN_INPUT | MUX_MODE1)            /*  mcspi3_clk */
                >;
        };
 
        mcspi4_pins: pinmux_mcspi4_pins {
                pinctrl-single,pins = <
-                       0x164 (PIN_INPUT | MUX_MODE1)           /*  mcspi2_clk */
-                       0x168 (PIN_INPUT | MUX_MODE1)           /*  mcspi2_simo */
-                       0x16a (PIN_INPUT | MUX_MODE1)           /*  mcspi2_somi */
-                       0x16c (PIN_INPUT | MUX_MODE1)           /*  mcspi2_cs */
+                       0x164 (PIN_INPUT | MUX_MODE1)           /*  mcspi4_clk */
+                       0x168 (PIN_INPUT | MUX_MODE1)           /*  mcspi4_simo */
+                       0x16a (PIN_INPUT | MUX_MODE1)           /*  mcspi4_somi */
+                       0x16c (PIN_INPUT | MUX_MODE1)           /*  mcspi4_cs0 */
                >;
        };