mtd: denali: fix NAND_CMD_PARAM command

NAND_CMD_PARAM (0xEC) command is not working on the Denali
NAND controller driver.

Unlike NAND_CMD_READID (0x90), when the NAND_CMD_PARAM command
is followed by an address cycle, the target device goes busy.
(R/B# is deasserted)
Wait until the parameter data are ready.

In addition, unnecessary clear_interrupts() should be removed.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Chin Liang See <clsee@altera.com>

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index ba3de1a..d9abc7e 100644 (file)
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1059,9 +1059,8 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
                addr = MODE_11 | BANK(denali->flash_bank);
                index_addr(denali, addr | 0, cmd);
                break;
-       case NAND_CMD_PARAM:
-               clear_interrupts(denali);
        case NAND_CMD_READID:
+       case NAND_CMD_PARAM:
                reset_buf(denali);
                /* sometimes ManufactureId read from register is not right
                 * e.g. some of Micron MT29F32G08QAA MLC NAND chips
@@ -1070,6 +1069,8 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
                addr = MODE_11 | BANK(denali->flash_bank);
                index_addr(denali, addr | 0, cmd);
                index_addr(denali, addr | 1, col & 0xFF);
+               if (cmd == NAND_CMD_PARAM)
+                       udelay(50);
                break;
        case NAND_CMD_READ0:
        case NAND_CMD_SEQIN: