;; %J: print tls_load/tls_gdcall/tls_ldcall suffix
;; %O: print only the displacement of a memory reference.
;; %R: print only the base register of a memory reference.
+;; %S: print S-type memory reference (base+displacement).
;; %N: print the second word of a DImode operand.
;; %M: print the second word of a TImode operand.
(match_operand:QI 2 "immediate_operand" "n,n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0))"
"@
- tm\t%0,%b1
- tmy\t%0,%b1"
+ tm\t%S0,%b1
+ tmy\t%S0,%b1"
[(set_attr "op_type" "SI,SIY")])
(define_insn "*tmdi_reg"
(match_operand:HI 1 "immediate_operand" "n")))]
"s390_match_ccmode (insn, s390_tm_ccmode (constm1_rtx, operands[1], 1))"
"tml\t%0,65535"
- [(set_attr "op_type" "RX")])
+ [(set_attr "op_type" "RI")])
(define_insn "*tmqi_full"
[(set (reg 33)
"s390_match_ccmode(insn, CCSmode)"
"@
ltr\t%2,%0
- icm\t%2,15,%0
- icmy\t%2,15,%0"
+ icm\t%2,15,%S0
+ icmy\t%2,15,%S0"
[(set_attr "op_type" "RR,RS,RSY")])
(define_insn "*tstsi_cconly"
"s390_match_ccmode(insn, CCSmode)"
"@
ltr\t%0,%0
- icm\t%2,15,%0
- icmy\t%2,15,%0"
+ icm\t%2,15,%S0
+ icmy\t%2,15,%S0"
[(set_attr "op_type" "RR,RS,RSY")])
(define_insn "*tstsi_cconly2"
(match_dup 0))]
"s390_match_ccmode(insn, CCTmode)"
"@
- icm\t%2,3,%0
- icmy\t%2,3,%0
+ icm\t%2,3,%S0
+ icmy\t%2,3,%S0
tml\t%0,65535"
[(set_attr "op_type" "RS,RSY,RI")])
(clobber (match_scratch:HI 2 "=d,d,X"))]
"s390_match_ccmode(insn, CCTmode)"
"@
- icm\t%2,3,%0
- icmy\t%2,3,%0
+ icm\t%2,3,%S0
+ icmy\t%2,3,%S0
tml\t%0,65535"
[(set_attr "op_type" "RS,RSY,RI")])
(match_dup 0))]
"s390_match_ccmode(insn, CCSmode)"
"@
- icm\t%2,3,%0
- icmy\t%2,3,%0"
+ icm\t%2,3,%S0
+ icmy\t%2,3,%S0"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*tsthi_cconly"
(clobber (match_scratch:HI 2 "=d,d"))]
"s390_match_ccmode(insn, CCSmode)"
"@
- icm\t%2,3,%0
- icmy\t%2,3,%0"
+ icm\t%2,3,%S0
+ icmy\t%2,3,%S0"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*tstqiCCT"
(match_dup 0))]
"s390_match_ccmode(insn, CCTmode)"
"@
- icm\t%2,1,%0
- icmy\t%2,1,%0
+ icm\t%2,1,%S0
+ icmy\t%2,1,%S0
tml\t%0,255"
[(set_attr "op_type" "RS,RSY,RI")])
(match_operand:QI 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCTmode)"
"@
- cli\t%0,0
- cliy\t%0,0
+ cli\t%S0,0
+ cliy\t%S0,0
tml\t%0,255"
[(set_attr "op_type" "SI,SIY,RI")])
(match_dup 0))]
"s390_match_ccmode(insn, CCSmode)"
"@
- icm\t%2,1,%0
- icmy\t%2,1,%0"
+ icm\t%2,1,%S0
+ icmy\t%2,1,%S0"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*tstqi_cconly"
(clobber (match_scratch:QI 2 "=d,d"))]
"s390_match_ccmode(insn, CCSmode)"
"@
- icm\t%2,1,%0
- icmy\t%2,1,%0"
+ icm\t%2,1,%S0
+ icmy\t%2,1,%S0"
[(set_attr "op_type" "RS,RSY")])
&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))
&& !register_operand (operands[1], HImode)"
"@
- clm\t%0,3,%1
- clmy\t%0,3,%1
+ clm\t%0,3,%S1
+ clmy\t%0,3,%S1
#"
[(set_attr "op_type" "RS,RSY,SS")])
&& (!s390_pool_operand (operands[0]) || !s390_pool_operand (operands[1]))
&& !register_operand (operands[1], QImode)"
"@
- clm\t%0,1,%1
- clmy\t%0,1,%1
- cli\t%0,%b1
- cliy\t%0,%b1
+ clm\t%0,1,%S1
+ clmy\t%0,1,%S1
+ cli\t%S0,%b1
+ cliy\t%S0,%b1
#"
[(set_attr "op_type" "RS,RSY,SI,SIY,SS")])
(use (match_operand 2 "const_int_operand" "n"))]
"s390_match_ccmode (insn, CCUmode)
&& INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
- "clc\t%O0(%2,%R0),%1"
+ "clc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
(match_operand:TI 1 "general_operand" "QS,d,dKm,d,Q"))]
"TARGET_64BIT"
"@
- lmg\t%0,%N0,%1
- stmg\t%1,%N1,%0
+ lmg\t%0,%N0,%S1
+ stmg\t%1,%N1,%S0
#
#
#"
(match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,R,T,*f,*f,Q"))]
"!TARGET_64BIT"
"@
- lm\t%0,%N0,%1
- stm\t%1,%N1,%0
+ lm\t%0,%N0,%S1
+ stm\t%1,%N1,%S0
#
#
ldr\t%0,%1
icy\t%0,%1
stc\t%1,%0
stcy\t%1,%0
- mvi\t%0,%b1
- mviy\t%0,%b1
+ mvi\t%S0,%b1
+ mviy\t%S0,%b1
#"
[(set_attr "op_type" "RR,RI,RX,RXY,RX,RXY,SI,SIY,SS")
(set_attr "type" "lr,*,*,*,store,store,store,store,cs")])
(clobber (reg:CC 33))]
""
"@
- icm\t%0,3,%1
- icmy\t%0,3,%1"
+ icm\t%0,3,%S1
+ icmy\t%0,3,%S1"
[(set_attr "op_type" "RS,RSY")])
;
ldy\t%0,%1
std\t%1,%0
stdy\t%1,%0
- lm\t%0,%N0,%1
- stm\t%1,%N1,%0
+ lm\t%0,%N0,%S1
+ stm\t%1,%N1,%S0
#
#
#"
(match_operand:BLK 1 "memory_operand" "Q"))
(use (match_operand 2 "const_int_operand" "n"))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
- "mvc\t%O0(%2,%R0),%1"
+ "mvc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (DImode, REGNO (operands[1]) + words - 1);
- return "lmg\t%1,%0,%2";
+ return "lmg\t%1,%0,%S2";
}
[(set_attr "op_type" "RSY")
(set_attr "type" "lm")])
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[1]) + words - 1);
- return which_alternative == 0 ? "lm\t%1,%0,%2" : "lmy\t%1,%0,%2";
+ return which_alternative == 0 ? "lm\t%1,%0,%S2" : "lmy\t%1,%0,%S2";
}
[(set_attr "op_type" "RS,RSY")
(set_attr "type" "lm")])
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (DImode, REGNO (operands[2]) + words - 1);
- return "stmg\t%2,%0,%1";
+ return "stmg\t%2,%0,%S1";
}
[(set_attr "op_type" "RSY")
(set_attr "type" "stm")])
{
int words = XVECLEN (operands[0], 0);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[2]) + words - 1);
- return which_alternative == 0 ? "stm\t%2,%0,%1" : "stmy\t%2,%0,%1";
+ return which_alternative == 0 ? "stm\t%2,%0,%S1" : "stmy\t%2,%0,%S1";
}
[(set_attr "op_type" "RS,RSY")
(set_attr "type" "stm")])
(clobber (reg:CC 33))]
""
"@
- icm\t%0,8,%1
- icmy\t%0,8,%1"
+ icm\t%0,8,%S1
+ icmy\t%0,8,%S1"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*sethighhisi"
(clobber (reg:CC 33))]
""
"@
- icm\t%0,12,%1
- icmy\t%0,12,%1"
+ icm\t%0,12,%S1
+ icmy\t%0,12,%S1"
[(set_attr "op_type" "RS,RSY")])
(define_insn "*sethighqidi_64"
(unspec:DI [(match_operand:QI 1 "s_operand" "QS")] UNSPEC_SETHIGH))
(clobber (reg:CC 33))]
"TARGET_64BIT"
- "icmh\t%0,8,%1"
+ "icmh\t%0,8,%S1"
[(set_attr "op_type" "RSY")])
(define_insn "*sethighqidi_31"
(clobber (reg:CC 33))]
"!TARGET_64BIT"
"@
- icm\t%0,8,%1
- icmy\t%0,8,%1"
+ icm\t%0,8,%S1
+ icmy\t%0,8,%S1"
[(set_attr "op_type" "RS,RSY")])
(define_insn_and_split "*extractqi"
(plus:DI (plus:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_64BIT"
"@
- alcgr\\t%0,%2
- alcg\\t%0,%2"
+ alcgr\t%0,%2
+ alcg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*adddi3_alc"
(clobber (reg:CC 33))]
"TARGET_64BIT"
"@
- alcgr\\t%0,%2
- alcg\\t%0,%2"
+ alcgr\t%0,%2
+ alcg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_slb_cc"
(minus:DI (minus:DI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_64BIT"
"@
- slbgr\\t%0,%2
- slbg\\t%0,%2"
+ slbgr\t%0,%2
+ slbg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*subdi3_slb"
(clobber (reg:CC 33))]
"TARGET_64BIT"
"@
- slbgr\\t%0,%2
- slbg\\t%0,%2"
+ slbgr\t%0,%2
+ slbg\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_expand "adddicc"
(plus:SI (plus:SI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_CPU_ZARCH"
"@
- alcr\\t%0,%2
- alc\\t%0,%2"
+ alcr\t%0,%2
+ alc\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*addsi3_alc"
(clobber (reg:CC 33))]
"TARGET_CPU_ZARCH"
"@
- alcr\\t%0,%2
- alc\\t%0,%2"
+ alcr\t%0,%2
+ alc\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*subsi3_slb_cc"
(minus:SI (minus:SI (match_dup 1) (match_dup 2)) (match_dup 3)))]
"s390_match_ccmode (insn, CCLmode) && TARGET_CPU_ZARCH"
"@
- slbr\\t%0,%2
- slb\\t%0,%2"
+ slbr\t%0,%2
+ slb\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_insn "*subsi3_slb"
(clobber (reg:CC 33))]
"TARGET_CPU_ZARCH"
"@
- slbr\\t%0,%2
- slb\\t%0,%2"
+ slbr\t%0,%2
+ slb\t%0,%2"
[(set_attr "op_type" "RRE,RXY")])
(define_expand "addsicc"
"@
nr\t%0,%2
nill\t%0,%b2
- ni\t%0,%b2
- niy\t%0,%b2
+ ni\t%S0,%b2
+ niy\t%S0,%b2
#"
[(set_attr "op_type" "RR,RI,SI,SIY,SS")])
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@
nr\t%0,%2
- ni\t%0,%b2
+ ni\t%S0,%b2
#"
[(set_attr "op_type" "RR,SI,SS")])
(use (match_operand 2 "const_int_operand" "n"))
(clobber (reg:CC 33))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
- "nc\t%O0(%2,%R0),%1"
+ "nc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
"@
or\t%0,%2
oill\t%0,%b2
- oi\t%0,%b2
- oiy\t%0,%b2
+ oi\t%S0,%b2
+ oiy\t%S0,%b2
#"
[(set_attr "op_type" "RR,RI,SI,SIY,SS")])
"!TARGET_ZARCH && s390_logical_operator_ok_p (operands)"
"@
or\t%0,%2
- oi\t%0,%b2
+ oi\t%S0,%b2
#"
[(set_attr "op_type" "RR,SI,SS")])
(use (match_operand 2 "const_int_operand" "n"))
(clobber (reg:CC 33))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
- "oc\t%O0(%2,%R0),%1"
+ "oc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
"s390_logical_operator_ok_p (operands)"
"@
xr\t%0,%2
- xi\t%0,%b2
- xiy\t%0,%b2
+ xi\t%S0,%b2
+ xiy\t%S0,%b2
#"
[(set_attr "op_type" "RR,SI,SIY,SS")])
(use (match_operand 2 "const_int_operand" "n"))
(clobber (reg:CC 33))]
"INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 256"
- "xc\t%O0(%2,%R0),%1"
+ "xc\t%O0(%2,%R0),%S1"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
(use (match_operand 1 "const_int_operand" "n"))
(clobber (reg:CC 33))]
"INTVAL (operands[1]) >= 1 && INTVAL (operands[1]) <= 256"
- "xc\t%O0(%1,%R0),%0"
+ "xc\t%O0(%1,%R0),%S0"
[(set_attr "op_type" "SS")
(set_attr "type" "cs")])
"TARGET_64BIT"
"@
ear\t%0,%%a0\;sllg\t%0,%0,32\;ear\t%0,%%a1
- stam\t%%a0,%%a1,%0"
+ stam\t%%a0,%%a1,%S0"
[(set_attr "op_type" "NN,RS")
(set_attr "atype" "reg,*")
(set_attr "type" "o3,*")
"!TARGET_64BIT"
"@
ear\t%0,%%a0
- stam\t%%a0,%%a0,%0"
+ stam\t%%a0,%%a0,%S0"
[(set_attr "op_type" "RRE,RS")])
(define_insn "set_tp_64"
"TARGET_64BIT"
"@
sar\t%%a1,%0\;srlg\t%1,%0,32\;sar\t%%a0,%1
- lam\t%%a0,%%a1,%0"
+ lam\t%%a0,%%a1,%S0"
[(set_attr "op_type" "NN,RS")
(set_attr "atype" "reg,*")
(set_attr "type" "o3,*")
"!TARGET_64BIT"
"@
sar\t%%a0,%0
- lam\t%%a0,%%a0,%0"
+ lam\t%%a0,%%a0,%S0"
[(set_attr "op_type" "RRE,RS")])
(define_insn "*tls_load_64"