[NFC][InstCombine] Add srem-by-signbit tests - still can fold to bittest

https://rise4fun.com/Alive/IIeS

llvm-svn: 366642

diff --git a/llvm/test/Transforms/InstCombine/rem.ll b/llvm/test/Transforms/InstCombine/rem.ll
index 200e038..c5adeb7 100644 (file)
--- a/llvm/test/Transforms/InstCombine/rem.ll
+++ b/llvm/test/Transforms/InstCombine/rem.ll
@@ -367,8 +367,8 @@ define i32 @test16(i32 %x, i32 %y) {
 define i32 @test17(i32 %X) {
 ; CHECK-LABEL: @test17(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[X:%.*]], 1
-; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i32
-; CHECK-NEXT:    ret i32 [[TMP2]]
+; CHECK-NEXT:    [[A:%.*]] = zext i1 [[TMP1]] to i32
+; CHECK-NEXT:    ret i32 [[A]]
 ;
   %A = urem i32 1, %X
   ret i32 %A
@@ -657,6 +657,50 @@ define <2 x i32> @test23(<2 x i32> %A) {
   ret <2 x i32> %mul
 }
 
+define i1 @test24(i32 %A) {
+; CHECK-LABEL: @test24(
+; CHECK-NEXT:    [[B:%.*]] = and i32 [[A:%.*]], 2147483647
+; CHECK-NEXT:    [[C:%.*]] = icmp ne i32 [[B]], 0
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %B = urem i32 %A, 2147483648 ; signbit
+  %C = icmp ne i32 %B, 0
+  ret i1 %C
+}
+
+define <2 x i1> @test24_vec(<2 x i32> %A) {
+; CHECK-LABEL: @test24_vec(
+; CHECK-NEXT:    [[B:%.*]] = and <2 x i32> [[A:%.*]], <i32 2147483647, i32 2147483647>
+; CHECK-NEXT:    [[C:%.*]] = icmp ne <2 x i32> [[B]], zeroinitializer
+; CHECK-NEXT:    ret <2 x i1> [[C]]
+;
+  %B = urem <2 x i32> %A, <i32 2147483648, i32 2147483648>
+  %C = icmp ne <2 x i32> %B, zeroinitializer
+  ret <2 x i1> %C
+}
+
+define i1 @test25(i32 %A) {
+; CHECK-LABEL: @test25(
+; CHECK-NEXT:    [[B:%.*]] = srem i32 [[A:%.*]], -2147483648
+; CHECK-NEXT:    [[C:%.*]] = icmp ne i32 [[B]], 0
+; CHECK-NEXT:    ret i1 [[C]]
+;
+  %B = srem i32 %A, 2147483648 ; signbit
+  %C = icmp ne i32 %B, 0
+  ret i1 %C
+}
+
+define <2 x i1> @test25_vec(<2 x i32> %A) {
+; CHECK-LABEL: @test25_vec(
+; CHECK-NEXT:    [[B:%.*]] = srem <2 x i32> [[A:%.*]], <i32 -2147483648, i32 -2147483648>
+; CHECK-NEXT:    [[C:%.*]] = icmp ne <2 x i32> [[B]], zeroinitializer
+; CHECK-NEXT:    ret <2 x i1> [[C]]
+;
+  %B = srem <2 x i32> %A, <i32 2147483648, i32 2147483648>
+  %C = icmp ne <2 x i32> %B, zeroinitializer
+  ret <2 x i1> %C
+}
+
 ; FP division-by-zero is not UB.
 
 define double @PR34870(i1 %cond, double %x, double %y) {