intel/genxml: Add bitmasks for CS_DEBUG_MODE2/INSTPM.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index 67fda86..541e440 100644 (file)
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -3631,6 +3631,10 @@
     <field name="3D Rendering Instruction Disable" start="0" end="0" type="bool"/>
     <field name="Media Instruction Disable" start="1" end="1" type="bool"/>
     <field name="CONSTANT_BUFFER Address Offset Disable" start="4" end="4" type="bool"/>
+
+    <field name="3D Rendering Instruction Disable Mask" start="16" end="16" type="bool"/>
+    <field name="Media Instruction Disable Mask" start="17" end="17" type="bool"/>
+    <field name="CONSTANT_BUFFER Address Offset Disable Mask" start="20" end="20" type="bool"/>
   </register>
 
 </genxml>

diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml
index dea1cd8..bd3800e 100644 (file)
--- a/src/intel/genxml/gen11.xml
+++ b/src/intel/genxml/gen11.xml
@@ -3629,6 +3629,10 @@
     <field name="3D Rendering Instruction Disable" start="0" end="0" type="bool"/>
     <field name="Media Instruction Disable" start="1" end="1" type="bool"/>
     <field name="CONSTANT_BUFFER Address Offset Disable" start="4" end="4" type="bool"/>
+
+    <field name="3D Rendering Instruction Disable Mask" start="16" end="16" type="bool"/>
+    <field name="Media Instruction Disable Mask" start="17" end="17" type="bool"/>
+    <field name="CONSTANT_BUFFER Address Offset Disable Mask" start="20" end="20" type="bool"/>
   </register>
 
 </genxml>

diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index f258065..c2967cd 100644 (file)
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1972,6 +1972,11 @@
     <field name="3D Rendering Instruction Disable" start="2" end="2" type="bool"/>
     <field name="Media Instruction Disable" start="3" end="3" type="bool"/>
     <field name="CONSTANT_BUFFER Address Offset Disable" start="6" end="6" type="bool"/>
+
+    <field name="3D State Instruction Disable Mask" start="17" end="17" type="bool"/>
+    <field name="3D Rendering Instruction Disable Mask" start="18" end="18" type="bool"/>
+    <field name="Media Instruction Disable Mask" start="19" end="19" type="bool"/>
+    <field name="CONSTANT_BUFFER Address Offset Disable Mask" start="22" end="22" type="bool"/>
   </register>
 
 </genxml>

diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 895f5d2..6dde797 100644 (file)
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -2621,6 +2621,11 @@
     <field name="3D Rendering Instruction Disable" start="2" end="2" type="bool"/>
     <field name="Media Instruction Disable" start="3" end="3" type="bool"/>
     <field name="CONSTANT_BUFFER Address Offset Disable" start="6" end="6" type="bool"/>
+
+    <field name="3D State Instruction Disable Mask" start="17" end="17" type="bool"/>
+    <field name="3D Rendering Instruction Disable Mask" start="18" end="18" type="bool"/>
+    <field name="Media Instruction Disable Mask" start="19" end="19" type="bool"/>
+    <field name="CONSTANT_BUFFER Address Offset Disable Mask" start="22" end="22" type="bool"/>
   </register>
 
 </genxml>

diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 54362bb..5b01fd4 100644 (file)
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -3135,6 +3135,11 @@
     <field name="3D Rendering Instruction Disable" start="2" end="2" type="bool"/>
     <field name="Media Instruction Disable" start="3" end="3" type="bool"/>
     <field name="CONSTANT_BUFFER Address Offset Disable" start="6" end="6" type="bool"/>
+
+    <field name="3D State Instruction Disable Mask" start="17" end="17" type="bool"/>
+    <field name="3D Rendering Instruction Disable Mask" start="18" end="18" type="bool"/>
+    <field name="Media Instruction Disable Mask" start="19" end="19" type="bool"/>
+    <field name="CONSTANT_BUFFER Address Offset Disable Mask" start="22" end="22" type="bool"/>
   </register>
 
 </genxml>

diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index 24c91e2..4ed41d1 100644 (file)
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -3374,6 +3374,11 @@
     <field name="3D Rendering Instruction Disable" start="2" end="2" type="bool"/>
     <field name="Media Instruction Disable" start="3" end="3" type="bool"/>
     <field name="CONSTANT_BUFFER Address Offset Disable" start="6" end="6" type="bool"/>
+
+    <field name="3D State Instruction Disable Mask" start="17" end="17" type="bool"/>
+    <field name="3D Rendering Instruction Disable Mask" start="18" end="18" type="bool"/>
+    <field name="Media Instruction Disable Mask" start="19" end="19" type="bool"/>
+    <field name="CONSTANT_BUFFER Address Offset Disable Mask" start="22" end="22" type="bool"/>
   </register>
 
 </genxml>

diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index dbef072..318ae89 100644 (file)
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -3703,6 +3703,10 @@
     <field name="3D Rendering Instruction Disable" start="0" end="0" type="bool"/>
     <field name="Media Instruction Disable" start="1" end="1" type="bool"/>
     <field name="CONSTANT_BUFFER Address Offset Disable" start="4" end="4" type="bool"/>
+
+    <field name="3D Rendering Instruction Disable Mask" start="16" end="16" type="bool"/>
+    <field name="Media Instruction Disable Mask" start="17" end="17" type="bool"/>
+    <field name="CONSTANT_BUFFER Address Offset Disable Mask" start="20" end="20" type="bool"/>
   </register>
 
 </genxml>