arm64: dts: rockchip: Add FriendlyARM NanoPi R5C
authorTianling Shen <cnsztl@gmail.com>
Sat, 18 Mar 2023 08:37:43 +0000 (16:37 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Wed, 22 Mar 2023 23:17:03 +0000 (00:17 +0100)
FriendlyARM NanoPi R5C is an open-sourced mini IoT gateway device.

Specification:
- Rockchip RK3568
- 1/4GB LPDDR4X RAM
- 8/32GB eMMC
- SD card slot
- M.2 Connector
- 2x USB 3.0 Port
- 2x 2500 Base-T (PCIe, r8125)
- HDMI 2.0
- MIPI DSI/CSI
- USB Type C 5V

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20230318083745.6181-4-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/Makefile
arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts [new file with mode: 0644]

index ade66d846a2020fd7b1d795726692e189f4b9c1f..a315a8117b0fa24a1ae89195ef8bdd011633d500 100644 (file)
@@ -84,6 +84,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-lubancat-1.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts
new file mode 100644 (file)
index 0000000..f70ca9f
--- /dev/null
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyelec.com)
+ *
+ * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
+ */
+
+/dts-v1/;
+#include "rk3568-nanopi-r5s.dtsi"
+
+/ {
+       model = "FriendlyElec NanoPi R5C";
+       compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";
+
+       gpio-keys {
+               compatible = "gpio-keys";
+               pinctrl-names = "default";
+               pinctrl-0 = <&reset_button_pin>;
+
+               button-reset {
+                       debounce-interval = <50>;
+                       gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
+                       label = "reset";
+                       linux,code = <KEY_RESTART>;
+               };
+       };
+
+       gpio-leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>;
+
+               led-lan {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_LAN;
+                       gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
+               };
+
+               power_led: led-power {
+                       color = <LED_COLOR_ID_RED>;
+                       function = LED_FUNCTION_POWER;
+                       linux,default-trigger = "heartbeat";
+                       gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
+               };
+
+               led-wan {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_WAN;
+                       gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
+               };
+
+               led-wlan {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_WLAN;
+                       gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
+               };
+       };
+};
+
+&pcie2x1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie20_reset_pin>;
+       reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};
+
+&pcie3x1 {
+       num-lanes = <1>;
+       reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
+       vpcie3v3-supply = <&vcc3v3_pcie>;
+       status = "okay";
+};
+
+&pcie3x2 {
+       num-lanes = <1>;
+       reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
+       vpcie3v3-supply = <&vcc3v3_pcie>;
+       status = "okay";
+};
+
+&pinctrl {
+       gpio-leds {
+               lan_led_pin: lan-led-pin {
+                       rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               power_led_pin: power-led-pin {
+                       rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               wan_led_pin: wan-led-pin {
+                       rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+
+               wlan_led_pin: wlan-led-pin {
+                       rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
+       pcie {
+               pcie20_reset_pin: pcie20-reset-pin {
+                       rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
+
+       rockchip-key {
+               reset_button_pin: reset-button-pin {
+                       rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+               };
+       };
+};