ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR

This enables the available eTSEC ethernet ports for the
ls1021aqds and ls1021atwr boards.
For the QDS, SGMII connections (via riser cards) are assumed
for the eTSEC0 and eTSEC1 ports as default configuration.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
index 4e64f38..0521e68 100644 (file)
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -124,6 +124,26 @@
        };
 };
 
+&enet0 {
+       tbi-handle = <&tbi0>;
+       phy-handle = <&sgmii_phy1c>;
+       phy-connection-type = "sgmii";
+       status = "okay";
+};
+
+&enet1 {
+       tbi-handle = <&tbi0>;
+       phy-handle = <&sgmii_phy1d>;
+       phy-connection-type = "sgmii";
+       status = "okay";
+};
+
+&enet2 {
+       phy-handle = <&rgmii_phy3>;
+       phy-connection-type = "rgmii-id";
+       status = "okay";
+};
+
 &i2c0 {
        status = "okay";
 

diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
index db41e4f..e008f93 100644 (file)
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -122,6 +122,26 @@
        };
 };
 
+&enet0 {
+       tbi-handle = <&tbi1>;
+       phy-handle = <&sgmii_phy2>;
+       phy-connection-type = "sgmii";
+       status = "okay";
+};
+
+&enet1 {
+       tbi-handle = <&tbi1>;
+       phy-handle = <&sgmii_phy0>;
+       phy-connection-type = "sgmii";
+       status = "okay";
+};
+
+&enet2 {
+       phy-handle = <&rgmii_phy1>;
+       phy-connection-type = "rgmii-id";
+       status = "okay";
+};
+
 &i2c0 {
        status = "okay";
 };