perf intel-pt: Add support for new branch instructions ERETS and ERETU
authorAdrian Hunter <adrian.hunter@intel.com>
Mon, 20 Mar 2023 18:35:17 +0000 (20:35 +0200)
committerArnaldo Carvalho de Melo <acme@redhat.com>
Mon, 20 Mar 2023 22:25:40 +0000 (19:25 -0300)
Intel Flexible Return and Event Delivery (FRED) adds instructions ERETS
(return to supervisor) and ERETU (return to user). Intel PT instruction
decoder needs to know about these instructions because they are
branch instructions. Similar to IRET instructions, when the decoder
encounters one of these instructions it will match it to a TIP (target
instruction pointer) packet that informs what the branch destination is.

The existing "x86 instruction decoder - new instructions" test can be
used to test the result e.g.

  $ perf test -v ins |& grep eret
  Decoded ok: f2 0f 01 ca         erets
  Decoded ok: f3 0f 01 ca         eretu

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20230320183517.15099-2-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
tools/perf/arch/x86/tests/insn-x86.c
tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.c
tools/perf/util/intel-pt-decoder/intel-pt-insn-decoder.h

index 94b490c434d07c93fdc1c3465f25115800bb4d86..735257d205b565a46d63bd2cb0a21585cff8d12b 100644 (file)
@@ -29,6 +29,8 @@ struct test_data test_data_64[] = {
 #include "insn-x86-dat-64.c"
        {{0x0f, 0x01, 0xee}, 3, 0, NULL, NULL, "0f 01 ee             \trdpkru"},
        {{0x0f, 0x01, 0xef}, 3, 0, NULL, NULL, "0f 01 ef             \twrpkru"},
+       {{0xf2, 0x0f, 0x01, 0xca}, 4, 0, "erets", "indirect", "f2 0f 01 ca  \terets"},
+       {{0xf3, 0x0f, 0x01, 0xca}, 4, 0, "eretu", "indirect", "f3 0f 01 ca  \teretu"},
        {{0}, 0, 0, NULL, NULL, NULL},
 };
 
@@ -49,6 +51,8 @@ static int get_op(const char *op_str)
                {"syscall", INTEL_PT_OP_SYSCALL},
                {"sysret",  INTEL_PT_OP_SYSRET},
                {"vmentry",  INTEL_PT_OP_VMENTRY},
+               {"erets",   INTEL_PT_OP_ERETS},
+               {"eretu",   INTEL_PT_OP_ERETU},
                {NULL, 0},
        };
        struct val_data *val;
index 22308dd930101d4ddbcdb9584220e472c281870e..c5d57027ec23d34e320a07a7d3e5d2a69c60dcdf 100644 (file)
@@ -52,6 +52,20 @@ static void intel_pt_insn_decoder(struct insn *insn,
                                op = INTEL_PT_OP_VMENTRY;
                                branch = INTEL_PT_BR_INDIRECT;
                                break;
+                       case 0xca:
+                               switch (insn->prefixes.bytes[3]) {
+                               case 0xf2: /* erets */
+                                       op = INTEL_PT_OP_ERETS;
+                                       branch = INTEL_PT_BR_INDIRECT;
+                                       break;
+                               case 0xf3: /* eretu */
+                                       op = INTEL_PT_OP_ERETU;
+                                       branch = INTEL_PT_BR_INDIRECT;
+                                       break;
+                               default:
+                                       break;
+                               }
+                               break;
                        default:
                                break;
                        }
@@ -230,6 +244,8 @@ const char *branch_name[] = {
        [INTEL_PT_OP_SYSCALL]   = "Syscall",
        [INTEL_PT_OP_SYSRET]    = "Sysret",
        [INTEL_PT_OP_VMENTRY]   = "VMentry",
+       [INTEL_PT_OP_ERETS]     = "Erets",
+       [INTEL_PT_OP_ERETU]     = "Eretu",
 };
 
 const char *intel_pt_insn_name(enum intel_pt_insn_op op)
@@ -273,6 +289,8 @@ int intel_pt_insn_type(enum intel_pt_insn_op op)
        case INTEL_PT_OP_LOOP:
                return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CONDITIONAL;
        case INTEL_PT_OP_IRET:
+       case INTEL_PT_OP_ERETS:
+       case INTEL_PT_OP_ERETU:
                return PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_RETURN |
                       PERF_IP_FLAG_INTERRUPT;
        case INTEL_PT_OP_INT:
index e3338b56a75f27c69c46510f013b01833bb4f82a..7fb7fe3a156607763fae4af67271f38d27d9804b 100644 (file)
@@ -25,6 +25,8 @@ enum intel_pt_insn_op {
        INTEL_PT_OP_SYSCALL,
        INTEL_PT_OP_SYSRET,
        INTEL_PT_OP_VMENTRY,
+       INTEL_PT_OP_ERETS,
+       INTEL_PT_OP_ERETU,
 };
 
 enum intel_pt_insn_branch {