habanalabs: add user API to get valid DRAM page sizes

Future devices will support multiple device memory page sizes.
In addition, an API for the user was added for it to be able to control
the device memory allocation page size.

This patch is a complementary patch to inform the user of the available
page size supported by the device.

Signed-off-by: Ohad Sharabi <osharabi@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/misc/habanalabs/common/habanalabs.h b/drivers/misc/habanalabs/common/habanalabs.h
index 6eb35e4..5647977 100644 (file)
--- a/drivers/misc/habanalabs/common/habanalabs.h
+++ b/drivers/misc/habanalabs/common/habanalabs.h
@@ -1304,6 +1304,7 @@ struct fw_load_mgr {
  * @get_stream_master_qid_arr: get pointer to stream masters QID array
  * @is_valid_dram_page_size: return true if page size is supported in device
  *                           memory allocation, otherwise false.
+ * @get_valid_dram_page_orders: get valid device memory allocation page orders
  */
 struct hl_asic_funcs {
        int (*early_init)(struct hl_device *hdev);
@@ -1432,6 +1433,7 @@ struct hl_asic_funcs {
        bool (*is_valid_dram_page_size)(u32 page_size);
        int (*mmu_get_real_page_size)(struct hl_device *hdev, struct hl_mmu_properties *mmu_prop,
                                        u32 page_size, u32 *real_page_size, bool is_dram_addr);
+       void (*get_valid_dram_page_orders)(struct hl_info_dev_memalloc_page_sizes *info);
 };
 
 

diff --git a/drivers/misc/habanalabs/common/habanalabs_ioctl.c b/drivers/misc/habanalabs/common/habanalabs_ioctl.c
index 14c5857..c6fe35a 100644 (file)
--- a/drivers/misc/habanalabs/common/habanalabs_ioctl.c
+++ b/drivers/misc/habanalabs/common/habanalabs_ioctl.c
@@ -591,6 +591,27 @@ static int razwi_info(struct hl_fpriv *hpriv, struct hl_info_args *args)
        return copy_to_user(out, &info, min_t(size_t, max_size, sizeof(info))) ? -EFAULT : 0;
 }
 
+static int dev_mem_alloc_page_sizes_info(struct hl_fpriv *hpriv, struct hl_info_args *args)
+{
+       void __user *out = (void __user *) (uintptr_t) args->return_pointer;
+       struct hl_info_dev_memalloc_page_sizes info = {0};
+       struct hl_device *hdev = hpriv->hdev;
+       u32 max_size = args->return_size;
+
+       if ((!max_size) || (!out))
+               return -EINVAL;
+
+       /*
+        * Future ASICs that will support multiple DRAM page sizes will support only "powers of 2"
+        * pages (unlike some of the ASICs before supporting multiple page sizes).
+        * For this reason for all ASICs that not support multiple page size the function will
+        * return an empty bitmask indicating that multiple page sizes is not supported.
+        */
+       hdev->asic_funcs->get_valid_dram_page_orders(&info);
+
+       return copy_to_user(out, &info, min_t(size_t, max_size, sizeof(info))) ? -EFAULT : 0;
+}
+
 static int _hl_info_ioctl(struct hl_fpriv *hpriv, void *data,
                                struct device *dev)
 {
@@ -641,6 +662,9 @@ static int _hl_info_ioctl(struct hl_fpriv *hpriv, void *data,
        case HL_INFO_RAZWI_EVENT:
                return razwi_info(hpriv, args);
 
+       case HL_INFO_DEV_MEM_ALLOC_PAGE_SIZES:
+               return dev_mem_alloc_page_sizes_info(hpriv, args);
+
        default:
                break;
        }

diff --git a/drivers/misc/habanalabs/gaudi/gaudi.c b/drivers/misc/habanalabs/gaudi/gaudi.c
index 5979434..64cb195 100644 (file)
--- a/drivers/misc/habanalabs/gaudi/gaudi.c
+++ b/drivers/misc/habanalabs/gaudi/gaudi.c
@@ -9378,6 +9378,12 @@ static u32 *gaudi_get_stream_master_qid_arr(void)
        return gaudi_stream_master;
 }
 
+static void gaudi_get_valid_dram_page_orders(struct hl_info_dev_memalloc_page_sizes *info)
+{
+       /* set 0 since multiple pages are not supported */
+       info->page_order_bitmask = 0;
+}
+
 static ssize_t infineon_ver_show(struct device *dev, struct device_attribute *attr, char *buf)
 {
        struct hl_device *hdev = dev_get_drvdata(dev);
@@ -9489,6 +9495,7 @@ static const struct hl_asic_funcs gaudi_funcs = {
        .get_stream_master_qid_arr = gaudi_get_stream_master_qid_arr,
        .is_valid_dram_page_size = NULL,
        .mmu_get_real_page_size = hl_mmu_get_real_page_size,
+       .get_valid_dram_page_orders = gaudi_get_valid_dram_page_orders,
 };
 
 /**

diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
index ec347bd..b182880 100644 (file)
--- a/drivers/misc/habanalabs/goya/goya.c
+++ b/drivers/misc/habanalabs/goya/goya.c
@@ -5679,6 +5679,12 @@ static u32 *goya_get_stream_master_qid_arr(void)
        return NULL;
 }
 
+static void goya_get_valid_dram_page_orders(struct hl_info_dev_memalloc_page_sizes *info)
+{
+       /* set 0 since multiple pages are not supported */
+       info->page_order_bitmask = 0;
+}
+
 static const struct hl_asic_funcs goya_funcs = {
        .early_init = goya_early_init,
        .early_fini = goya_early_fini,
@@ -5767,6 +5773,7 @@ static const struct hl_asic_funcs goya_funcs = {
        .get_stream_master_qid_arr = goya_get_stream_master_qid_arr,
        .is_valid_dram_page_size = NULL,
        .mmu_get_real_page_size = hl_mmu_get_real_page_size,
+       .get_valid_dram_page_orders = goya_get_valid_dram_page_orders,
 };
 
 /*

diff --git a/include/uapi/misc/habanalabs.h b/include/uapi/misc/habanalabs.h
index ae24415..f474e7f 100644 (file)
--- a/include/uapi/misc/habanalabs.h
+++ b/include/uapi/misc/habanalabs.h
@@ -348,33 +348,35 @@ enum hl_server_type {
  *                            The address which accessing it caused the razwi.
  *                            Razwi initiator.
  *                            Razwi cause, was it a page fault or MMU access error.
+ * HL_INFO_DEV_MEM_ALLOC_PAGE_SIZES - Retrieve valid page sizes for device memory allocation
  */
-#define HL_INFO_HW_IP_INFO             0
-#define HL_INFO_HW_EVENTS              1
-#define HL_INFO_DRAM_USAGE             2
-#define HL_INFO_HW_IDLE                        3
-#define HL_INFO_DEVICE_STATUS          4
-#define HL_INFO_DEVICE_UTILIZATION     6
-#define HL_INFO_HW_EVENTS_AGGREGATE    7
-#define HL_INFO_CLK_RATE               8
-#define HL_INFO_RESET_COUNT            9
-#define HL_INFO_TIME_SYNC              10
-#define HL_INFO_CS_COUNTERS            11
-#define HL_INFO_PCI_COUNTERS           12
-#define HL_INFO_CLK_THROTTLE_REASON    13
-#define HL_INFO_SYNC_MANAGER           14
-#define HL_INFO_TOTAL_ENERGY           15
-#define HL_INFO_PLL_FREQUENCY          16
-#define HL_INFO_POWER                  17
-#define HL_INFO_OPEN_STATS             18
-#define HL_INFO_DRAM_REPLACED_ROWS     21
-#define HL_INFO_DRAM_PENDING_ROWS      22
-#define HL_INFO_LAST_ERR_OPEN_DEV_TIME 23
-#define HL_INFO_CS_TIMEOUT_EVENT       24
-#define HL_INFO_RAZWI_EVENT            25
-
-#define HL_INFO_VERSION_MAX_LEN                128
-#define HL_INFO_CARD_NAME_MAX_LEN      16
+#define HL_INFO_HW_IP_INFO                     0
+#define HL_INFO_HW_EVENTS                      1
+#define HL_INFO_DRAM_USAGE                     2
+#define HL_INFO_HW_IDLE                                3
+#define HL_INFO_DEVICE_STATUS                  4
+#define HL_INFO_DEVICE_UTILIZATION             6
+#define HL_INFO_HW_EVENTS_AGGREGATE            7
+#define HL_INFO_CLK_RATE                       8
+#define HL_INFO_RESET_COUNT                    9
+#define HL_INFO_TIME_SYNC                      10
+#define HL_INFO_CS_COUNTERS                    11
+#define HL_INFO_PCI_COUNTERS                   12
+#define HL_INFO_CLK_THROTTLE_REASON            13
+#define HL_INFO_SYNC_MANAGER                   14
+#define HL_INFO_TOTAL_ENERGY                   15
+#define HL_INFO_PLL_FREQUENCY                  16
+#define HL_INFO_POWER                          17
+#define HL_INFO_OPEN_STATS                     18
+#define HL_INFO_DRAM_REPLACED_ROWS             21
+#define HL_INFO_DRAM_PENDING_ROWS              22
+#define HL_INFO_LAST_ERR_OPEN_DEV_TIME         23
+#define HL_INFO_CS_TIMEOUT_EVENT               24
+#define HL_INFO_RAZWI_EVENT                    25
+#define HL_INFO_DEV_MEM_ALLOC_PAGE_SIZES       26
+
+#define HL_INFO_VERSION_MAX_LEN                        128
+#define HL_INFO_CARD_NAME_MAX_LEN              16
 
 /**
  * struct hl_info_hw_ip_info - hardware information on various IPs in the ASIC
@@ -643,6 +645,15 @@ struct hl_info_razwi_event {
        __u8 pad[2];
 };
 
+/**
+ * struct hl_info_dev_memalloc_page_sizes - valid page sizes in device mem alloc information.
+ * @page_order_bitmask: bitmap in which a set bit represents the order of the supported page size
+ *                      (e.g. 0x2100000 means that 1MB and 32MB pages are supported).
+ */
+struct hl_info_dev_memalloc_page_sizes {
+       __u64 page_order_bitmask;
+};
+
 enum gaudi_dcores {
        HL_GAUDI_WS_DCORE,
        HL_GAUDI_WN_DCORE,