intel/fs: enable bindless sampler state offsets
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Wed, 22 Feb 2023 13:44:41 +0000 (15:44 +0200)
committerMarge Bot <emma+marge@anholt.net>
Tue, 30 May 2023 06:36:37 +0000 (06:36 +0000)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>

src/intel/compiler/brw_compiler.h
src/intel/compiler/brw_lower_logical_sends.cpp

index 2750ac6..77f23cd 100644 (file)
@@ -121,6 +121,14 @@ struct brw_compiler {
     */
    bool extended_bindless_surface_offset;
 
+   /**
+    * Gfx11+ has a bit in the dword 3 of the sampler message header that
+    * indicates whether the sampler handle is relative to the dynamic state
+    * base address (0) or the bindless sampler base address (1). The driver
+    * can select this.
+    */
+   bool use_bindless_sampler_offset;
+
    struct nir_shader *clc_shader;
 };
 
index 0309572..6e68008 100644 (file)
@@ -882,7 +882,12 @@ lower_sampler_logical_send_gfx7(const fs_builder &bld, fs_inst *inst, opcode op,
           * address space but means we can do something more efficient in the
           * shader.
           */
-         ubld1.MOV(component(header, 3), sampler_handle);
+         if (compiler->use_bindless_sampler_offset) {
+            assert(devinfo->ver >= 11);
+            ubld1.OR(component(header, 3), sampler_handle, brw_imm_ud(1));
+         } else {
+            ubld1.MOV(component(header, 3), sampler_handle);
+         }
       } else if (is_high_sampler(devinfo, sampler)) {
          fs_reg sampler_state_ptr =
             retype(brw_vec1_grf(0, 3), BRW_REGISTER_TYPE_UD);