With the NIR code, we have instructions groups that use
INTERP_LOAD_P0 that don't fill all slots. Just make sure
the backend scheduler doesn't fill in INTERP_LOAD_P0
instructions with a different LDS location.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15714>
if (is_alu_once_inst(prev[i]))
return 0;
+ if (prev[i]->op == ALU_OP1_INTERP_LOAD_P0)
+ interp_xz |= 3;
if (prev[i]->op == ALU_OP2_INTERP_X)
interp_xz |= 1;
if (prev[i]->op == ALU_OP2_INTERP_Z)
return 0;
if (is_alu_once_inst(slots[i]))
return 0;
+ if (slots[i]->op == ALU_OP1_INTERP_LOAD_P0)
+ interp_xz |= 3;
if (slots[i]->op == ALU_OP2_INTERP_X)
interp_xz |= 1;
if (slots[i]->op == ALU_OP2_INTERP_Z)