staging: rtl8192e: Rename BaseBand_Config_PHY_REG and BaseBand_Config_AGC_TAB
authorPhilipp Hortmann <philipp.g.hortmann@gmail.com>
Sun, 29 Jan 2023 14:58:30 +0000 (15:58 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 31 Jan 2023 10:16:34 +0000 (11:16 +0100)
Rename constants BaseBand_Config_PHY_REG to BB_CONFIG_PHY_REG and
BaseBand_Config_AGC_TAB to BB_CONFIG_AGC_TAB to avoid CamelCase which is
not accepted by checkpatch.

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/6d26690c7c2c68cc7c766c981293bd8e40999ed0.1675003608.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/rtl8192e/rtl8192e/r8192E_hw.h
drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c

index 3e22315..858cfc2 100644 (file)
@@ -8,8 +8,8 @@
 #define R8180_HW
 
 enum baseband_config {
-       BaseBand_Config_PHY_REG = 0,
-       BaseBand_Config_AGC_TAB = 1,
+       BB_CONFIG_PHY_REG = 0,
+       BB_CONFIG_AGC_TAB = 1,
 };
 
 #define        RTL8187_REQT_READ       0xc0
index 456b7ca..cbda027 100644 (file)
@@ -342,13 +342,13 @@ static void _rtl92e_phy_config_bb(struct net_device *dev, u8 ConfigType)
                Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArray;
        }
 
-       if (ConfigType == BaseBand_Config_PHY_REG) {
+       if (ConfigType == BB_CONFIG_PHY_REG) {
                for (i = 0; i < PHY_REGArrayLen; i += 2) {
                        rtl92e_set_bb_reg(dev, Rtl819XPHY_REGArray_Table[i],
                                          bMaskDWord,
                                          Rtl819XPHY_REGArray_Table[i+1]);
                }
-       } else if (ConfigType == BaseBand_Config_AGC_TAB) {
+       } else if (ConfigType == BB_CONFIG_AGC_TAB) {
                for (i = 0; i < AGCTAB_ArrayLen; i += 2) {
                        rtl92e_set_bb_reg(dev, Rtl819XAGCTAB_Array_Table[i],
                                          bMaskDWord,
@@ -526,12 +526,12 @@ static bool _rtl92e_bb_config_para_file(struct net_device *dev)
                        return rtStatus;
        }
        rtl92e_set_bb_reg(dev, rFPGA0_RFMOD, bCCKEn|bOFDMEn, 0x0);
-       _rtl92e_phy_config_bb(dev, BaseBand_Config_PHY_REG);
+       _rtl92e_phy_config_bb(dev, BB_CONFIG_PHY_REG);
 
        dwRegValue = rtl92e_readl(dev, CPU_GEN);
        rtl92e_writel(dev, CPU_GEN, (dwRegValue|CPU_GEN_BB_RST));
 
-       _rtl92e_phy_config_bb(dev, BaseBand_Config_AGC_TAB);
+       _rtl92e_phy_config_bb(dev, BB_CONFIG_AGC_TAB);
 
        if (priv->ic_cut  > VERSION_8190_BD) {
                if (priv->rf_type == RF_2T4R)