Stop using immap_t on 85xx

In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/cds/mpc8541cds/mpc8541cds.c b/board/cds/mpc8541cds/mpc8541cds.c
index 5b64fd6..9ab98d4 100644 (file)
--- a/board/cds/mpc8541cds/mpc8541cds.c
+++ b/board/cds/mpc8541cds/mpc8541cds.c
@@ -293,9 +293,8 @@ initdram(int board_type)
 void
 local_bus_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        uint clkdiv;
        uint lbc_hz;
@@ -344,8 +343,7 @@ sdram_init(void)
 #if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM)
 
        uint idx;
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
        uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
        uint cpu_board_rev;
        uint lsdmr_common;

diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c
index ddf308a..47e2dd8 100644 (file)
--- a/board/cds/mpc8548cds/mpc8548cds.c
+++ b/board/cds/mpc8548cds/mpc8548cds.c
@@ -54,9 +54,8 @@ int board_early_init_f (void)
 
 int checkboard (void)
 {
-       volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
+       volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
 
        /* PCI slot in USER bits CSR[6:7] by convention. */
        uint pci_slot = get_pci_slot ();
@@ -137,9 +136,8 @@ initdram(int board_type)
 void
 local_bus_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        uint clkdiv;
        uint lbc_hz;
@@ -175,8 +173,7 @@ sdram_init(void)
 #if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM)
 
        uint idx;
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
        uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
        uint cpu_board_rev;
        uint lsdmr_common;

diff --git a/board/cds/mpc8555cds/mpc8555cds.c b/board/cds/mpc8555cds/mpc8555cds.c
index 3ed1005..74c220d 100644 (file)
--- a/board/cds/mpc8555cds/mpc8555cds.c
+++ b/board/cds/mpc8555cds/mpc8555cds.c
@@ -291,9 +291,8 @@ initdram(int board_type)
 void
 local_bus_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        uint clkdiv;
        uint lbc_hz;
@@ -342,8 +341,7 @@ sdram_init(void)
 #if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM)
 
        uint idx;
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
        uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
        uint cpu_board_rev;
        uint lsdmr_common;

diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index e13be63..66cb536 100644 (file)
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -49,10 +49,9 @@ int board_early_init_f (void)
 
 int checkboard (void)
 {
-       volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
-       volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
+       volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
 
        if ((uint)&gur->porpllsr != 0xe00e0000) {
                printf("immap size error %x\n",&gur->porpllsr);

diff --git a/board/mpc8540ads/mpc8540ads.c b/board/mpc8540ads/mpc8540ads.c
index 4e7f856..35f5eea 100644 (file)
--- a/board/mpc8540ads/mpc8540ads.c
+++ b/board/mpc8540ads/mpc8540ads.c
@@ -121,9 +121,8 @@ initdram(int board_type)
 void
 local_bus_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        uint clkdiv;
        uint lbc_hz;
@@ -182,8 +181,7 @@ local_bus_init(void)
 void
 sdram_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_lbc_t *lbc= &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
        uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
 
        puts("    SDRAM: ");
@@ -278,8 +276,7 @@ int testdram (void)
 long int fixed_sdram (void)
 {
   #ifndef CFG_RAMBOOT
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+       volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
 
        ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
        ddr->cs0_config = CFG_DDR_CS0_CONFIG;

diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c
index 52fe8ca..64dfe09 100644 (file)
--- a/board/mpc8540eval/mpc8540eval.c
+++ b/board/mpc8540eval/mpc8540eval.c
@@ -35,8 +35,7 @@ long int fixed_sdram (void);
 int board_pre_init (void)
 {
 #if defined(CONFIG_PCI)
-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
-       volatile ccsr_pcix_t *pci = &immr->im_pcix;
+       volatile ccsr_pcix_t *pci = (void *)(CFG_MPC85xx_PCIX_ADDR);
 
        pci->peer &= 0xffffffdf; /* disable master abort */
 #endif
@@ -68,9 +67,8 @@ long int initdram (int board_type)
 {
        long dram_size = 0;
        extern long spd_sdram (void);
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
 #if !defined(CONFIG_RAM_AS_FLASH)
-       volatile ccsr_lbc_t *lbc= &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
        sys_info_t sysinfo;
        uint temp_lbcdll = 0;
 #endif
@@ -138,8 +136,7 @@ long int initdram (int board_type)
                 * enable errors */
                uint *p = 0;
                uint i = 0;
-               volatile immap_t *immap = (immap_t *)CFG_IMMR;
-               volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+               volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
                dma_init();
                for (*p = 0; p < (uint *)(8 * 1024); p++) {
                        if (((unsigned int)p & 0x1f) == 0) { dcbz(p); }
@@ -222,8 +219,7 @@ int testdram (void)
 long int fixed_sdram (void)
 {
 #ifndef CFG_RAMBOOT
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+       volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
 
        ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
        ddr->cs0_config = CFG_DDR_CS0_CONFIG;

diff --git a/board/mpc8560ads/mpc8560ads.c b/board/mpc8560ads/mpc8560ads.c
index 7a7941f..bb7f11b 100644 (file)
--- a/board/mpc8560ads/mpc8560ads.c
+++ b/board/mpc8560ads/mpc8560ads.c
@@ -323,9 +323,8 @@ initdram(int board_type)
 void
 local_bus_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        uint clkdiv;
        uint lbc_hz;
@@ -384,8 +383,7 @@ local_bus_init(void)
 void
 sdram_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_lbc_t *lbc= &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
        uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
 
        puts("    SDRAM: ");
@@ -480,8 +478,7 @@ int testdram (void)
 long int fixed_sdram (void)
 {
   #ifndef CFG_RAMBOOT
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+       volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
 
        ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
        ddr->cs0_config = CFG_DDR_CS0_CONFIG;

diff --git a/board/mpc8568mds/mpc8568mds.c b/board/mpc8568mds/mpc8568mds.c
index 3e3feec..460cb1b 100644 (file)
--- a/board/mpc8568mds/mpc8568mds.c
+++ b/board/mpc8568mds/mpc8568mds.c
@@ -178,9 +178,8 @@ initdram(int board_type)
 void
 local_bus_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        uint clkdiv;
        uint lbc_hz;
@@ -213,8 +212,7 @@ sdram_init(void)
 #if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM)
 
        uint idx;
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
        uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
        uint lsdmr_common;
 

diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c
index 15e948c..999d8b5 100644 (file)
--- a/board/pm854/pm854.c
+++ b/board/pm854/pm854.c
@@ -45,8 +45,7 @@ long int fixed_sdram(void);
 int board_early_init_f (void)
 {
 #if defined(CONFIG_PCI)
-    volatile immap_t *immr = (immap_t *)CFG_IMMR;
-    volatile ccsr_pcix_t *pci = &immr->im_pcix;
+    volatile ccsr_pcix_t *pci = (void *)(CFG_MPC85xx_PCIX_ADDR);
 
     pci->peer &= 0xffffffdf; /* disable master abort */
 #endif
@@ -132,9 +131,8 @@ initdram(int board_type)
 void
 local_bus_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        uint clkdiv;
        uint lbc_hz;
@@ -228,8 +226,7 @@ int testdram (void)
 long int fixed_sdram (void)
 {
   #ifndef CFG_RAMBOOT
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+       volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
 
        ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
        ddr->cs0_config = CFG_DDR_CS0_CONFIG;

diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c
index da4fd88..bfde695 100644 (file)
--- a/board/pm856/pm856.c
+++ b/board/pm856/pm856.c
@@ -286,9 +286,8 @@ initdram(int board_type)
 void
 local_bus_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        uint clkdiv;
        uint lbc_hz;
@@ -381,8 +380,7 @@ int testdram (void)
 long int fixed_sdram (void)
 {
   #ifndef CFG_RAMBOOT
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+       volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
 
        ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
        ddr->cs0_config = CFG_DDR_CS0_CONFIG;

diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c
index e02fb55..47df884 100644 (file)
--- a/board/sbc8560/sbc8560.c
+++ b/board/sbc8560/sbc8560.c
@@ -195,8 +195,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
 int board_early_init_f (void)
 {
 #if defined(CONFIG_PCI)
-    volatile immap_t *immr = (immap_t *)CFG_IMMR;
-    volatile ccsr_pcix_t *pci = &immr->im_pcix;
+    volatile ccsr_pcix_t *pci = (void *)(CFG_MPC85xx_PCIX_ADDR);
 
     pci->peer &= 0xfffffffdf; /* disable master abort */
 #endif
@@ -266,7 +265,7 @@ long int initdram (int board_type)
        extern long spd_sdram (void);
 #if 0
 #if !defined(CONFIG_RAM_AS_FLASH)
-       volatile ccsr_lbc_t *lbc= &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
        sys_info_t sysinfo;
        uint temp_lbcdll = 0;
 #endif
@@ -335,8 +334,7 @@ long int initdram (int board_type)
                 * enable errors */
                uint *p = 0;
                uint i = 0;
-               volatile immap_t *immap = (immap_t *)CFG_IMMR;
-               volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+               volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
                dma_init();
                for (*p = 0; p < (uint *)(8 * 1024); p++) {
                        if (((unsigned int)p & 0x1f) == 0) { dcbz(p); }
@@ -423,8 +421,7 @@ long int fixed_sdram (void)
 #define CFG_DDR_CONTROL 0xc2000000
 
   #ifndef CFG_RAMBOOT
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+       volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
 
        ddr->cs0_bnds           = 0x00000007;
        ddr->cs1_bnds           = 0x0010001f;

diff --git a/board/stxgp3/stxgp3.c b/board/stxgp3/stxgp3.c
index 3b04949..3649acf 100644 (file)
--- a/board/stxgp3/stxgp3.c
+++ b/board/stxgp3/stxgp3.c
@@ -203,8 +203,7 @@ int
 board_early_init_f(void)
 {
 #if defined(CONFIG_PCI)
-    volatile immap_t *immr = (immap_t *)CFG_IMMR;
-    volatile ccsr_pcix_t *pci = &immr->im_pcix;
+    volatile ccsr_pcix_t *pci = (void *)(CFG_MPC85xx_PCIX_ADDR);
 
     pci->peer &= 0xfffffffdf; /* disable master abort */
 #endif

diff --git a/board/stxssa/stxssa.c b/board/stxssa/stxssa.c
index 253fb2b..e2b38a6 100644 (file)
--- a/board/stxssa/stxssa.c
+++ b/board/stxssa/stxssa.c
@@ -252,8 +252,7 @@ int
 board_early_init_f(void)
 {
 #if defined(CONFIG_PCI)
-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
-       volatile ccsr_pcix_t *pci = &immr->im_pcix;
+       volatile ccsr_pcix_t *pci = (void *)(CFG_MPC85xx_PCIX_ADDR);
 
        pci->peer &= 0xffffffdf; /* disable master abort */
 #endif

diff --git a/board/tqm85xx/sdram.c b/board/tqm85xx/sdram.c
index 8ca50f5..2053ade 100644 (file)
--- a/board/tqm85xx/sdram.c
+++ b/board/tqm85xx/sdram.c
@@ -57,8 +57,7 @@ int cas_latency(void);
 long int sdram_setup(int casl)
 {
        int i;
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
-       volatile ccsr_ddr_t *ddr = &immap->im_ddr;
+       volatile ccsr_ddr_t *ddr = (void *)(CFG_MPC85xx_DDR_ADDR);
        unsigned long cfg_ddr_timing1;
        unsigned long cfg_ddr_mode;
 

diff --git a/board/tqm85xx/tqm85xx.c b/board/tqm85xx/tqm85xx.c
index c45676c..5d5cb1b 100644 (file)
--- a/board/tqm85xx/tqm85xx.c
+++ b/board/tqm85xx/tqm85xx.c
@@ -262,8 +262,7 @@ int checkboard (void)
 
 int misc_init_r (void)
 {
-       volatile immap_t    *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_lbc_t *memctl = &immap->im_lbc;
+       volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        /*
         * Adjust flash start and offset to detected values
@@ -324,9 +323,8 @@ int misc_init_r (void)
  */
 void local_bus_init (void)
 {
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+       volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
        uint clkdiv;
        uint lbc_hz;

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 50ff3b4..e55d337 100644 (file)
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -108,8 +108,7 @@ int checkcpu (void)
        lcrr = CFG_LBC_LCRR;
 #else
        {
-           volatile immap_t *immap = (immap_t *)CFG_IMMR;
-           volatile ccsr_lbc_t *lbc= &immap->im_lbc;
+           volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
 
            lcrr = lbc->lcrr;
        }
@@ -209,8 +208,7 @@ reset_85xx_watchdog(void)
 
 #if defined(CONFIG_DDR_ECC)
 void dma_init(void) {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_dma_t *dma = &immap->im_dma;
+       volatile ccsr_dma_t *dma = (void *)(CFG_MPC85xx_DMA_ADDR);
 
        dma->satr0 = 0x02c40000;
        dma->datr0 = 0x02c40000;
@@ -220,8 +218,7 @@ void dma_init(void) {
 }
 
 uint dma_check(void) {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_dma_t *dma = &immap->im_dma;
+       volatile ccsr_dma_t *dma = (void *)(CFG_MPC85xx_DMA_ADDR);
        volatile uint status = dma->sr0;
 
        /* While the channel is busy, spin */
@@ -240,8 +237,7 @@ uint dma_check(void) {
 }
 
 int dma_xfer(void *dest, uint count, void *src) {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_dma_t *dma = &immap->im_dma;
+       volatile ccsr_dma_t *dma = (void *)(CFG_MPC85xx_DMA_ADDR);
 
        dma->dar0 = (uint) dest;
        dma->sar0 = (uint) src;

diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 5af69ce..fdb9ecb 100644 (file)
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -131,8 +131,7 @@ void config_8560_ioports (volatile ccsr_cpm_t * cpm)
 
 void cpu_init_f (void)
 {
-       volatile immap_t    *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_lbc_t *memctl = &immap->im_lbc;
+       volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR);
        extern void m8560_cpm_reset (void);
 
        /* Pointer is writable since we allocated a register for it */
@@ -222,18 +221,15 @@ void cpu_init_f (void)
 
 int cpu_init_r(void)
 {
-#if defined(CONFIG_CLEAR_LAW0) || defined(CONFIG_L2_CACHE)
-       volatile immap_t    *immap = (immap_t *)CFG_IMMR;
-#endif
 #ifdef CONFIG_CLEAR_LAW0
-       volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
+       volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
 
        /* clear alternate boot location LAW (used for sdram, or ddr bank) */
        ecm->lawar0 = 0;
 #endif
 
 #if defined(CONFIG_L2_CACHE)
-       volatile ccsr_l2cache_t *l2cache = &immap->im_l2cache;
+       volatile ccsr_l2cache_t *l2cache = (void *)CFG_MPC85xx_L2_ADDR;
        volatile uint cache_ctl;
        uint svr, ver;
        uint l2srbar;

diff --git a/cpu/mpc85xx/interrupts.c b/cpu/mpc85xx/interrupts.c
index bf737d6..18e5377 100644 (file)
--- a/cpu/mpc85xx/interrupts.c
+++ b/cpu/mpc85xx/interrupts.c
@@ -80,19 +80,17 @@ int disable_interrupts (void)
 
 int interrupt_init (void)
 {
-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
 
-       immr->im_pic.gcr = MPC85xx_PICGCR_RST;
-       while (immr->im_pic.gcr & MPC85xx_PICGCR_RST);
-       immr->im_pic.gcr = MPC85xx_PICGCR_M;
+       pic->gcr = MPC85xx_PICGCR_RST;
+       while (pic->gcr & MPC85xx_PICGCR_RST);
+       pic->gcr = MPC85xx_PICGCR_M;
        decrementer_count = get_tbclk() / CFG_HZ;
        mtspr(SPRN_TCR, TCR_PIE);
        set_dec (decrementer_count);
        set_msr (get_msr () | MSR_EE);
 
 #ifdef CONFIG_INTERRUPTS
-       volatile ccsr_pic_t *pic = &immr->im_pic;
-
        pic->iivpr1 = 0x810002; /* 50220 enable ecm interrupts */
        debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1);
 

diff --git a/cpu/mpc85xx/pci.c b/cpu/mpc85xx/pci.c
index d9f49c8..a5060cd 100644 (file)
--- a/cpu/mpc85xx/pci.c
+++ b/cpu/mpc85xx/pci.c
@@ -39,10 +39,9 @@ pci_mpc85xx_init(struct pci_controller *board_hose)
        u16 reg16;
        u32 dev;
 
-       volatile immap_t    *immap = (immap_t *)CFG_CCSRBAR;
-       volatile ccsr_pcix_t *pcix = &immap->im_pcix;
+       volatile ccsr_pcix_t *pcix = (void *)(CFG_MPC85xx_PCIX_ADDR);
 #ifdef CONFIG_MPC85XX_PCI2
-       volatile ccsr_pcix_t *pcix2 = &immap->im_pcix2;
+       volatile ccsr_pcix_t *pcix2 = (void *)(CFG_MPC85xx_PCIX2_ADDR);
 #endif
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
        struct pci_controller * hose;

diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index 307ba3b..2a4cd57 100644 (file)
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -171,8 +171,7 @@ unsigned int determine_refresh_rate(unsigned int spd_refresh)
 long int
 spd_sdram(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_ddr_t *ddr = &immap->im_ddr;
+       volatile ccsr_ddr_t *ddr = (void *)(CFG_MPC85xx_DDR_ADDR);
        spd_eeprom_t spd;
        unsigned int n_ranks;
        unsigned int rank_density;
@@ -1023,8 +1022,7 @@ spd_sdram(void)
 static unsigned int
 setup_laws_and_tlbs(unsigned int memsize)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
+       volatile ccsr_local_ecm_t *ecm = (void *)(CFG_MPC85xx_ECM_ADDR);
        unsigned int tlb_size;
        unsigned int law_size;
        unsigned int ram_tlb_index;
@@ -1130,8 +1128,7 @@ ddr_enable_ecc(unsigned int dram_size)
 {
        uint *p = 0;
        uint i = 0;
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_ddr_t *ddr= &immap->im_ddr;
+       volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
 
        dma_init();
 

diff --git a/cpu/mpc85xx/traps.c b/cpu/mpc85xx/traps.c
index efc80c7..2381fb0 100644 (file)
--- a/cpu/mpc85xx/traps.c
+++ b/cpu/mpc85xx/traps.c
@@ -288,8 +288,8 @@ UnknownException(struct pt_regs *regs)
 void
 ExtIntException(struct pt_regs *regs)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
-       volatile ccsr_pic_t *pic = &immap->im_pic;
+       volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
+
        uint vect;
 
 #if defined(CONFIG_CMD_KGDB)

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 393fdda..d769d70 100644 (file)
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -720,11 +720,10 @@ typedef struct ccsr_tsec {
 } ccsr_tsec_t;
 
 /*
- * PIC Registers(0x2_6000-0x4_0000-0x8_0000)
+ * PIC Registers(0x4_0000-0x8_0000)
  */
 typedef struct ccsr_pic {
-       char    res0[106496];   /* 0x26000-0x40000 */
-       char    res1[64];
+       char    res1[64];       /* 0x40000 */
        uint    ipidr0;         /* 0x40040 - Interprocessor Interrupt Dispatch Register 0 */
        char    res2[12];
        uint    ipidr1;         /* 0x40050 - Interprocessor Interrupt Dispatch Register 1 */
@@ -1617,30 +1616,27 @@ typedef struct ccsr_gur {
        char    res15[61648];   /* 0xe0f30 to 0xefffff */
 } ccsr_gur_t;
 
-#define CFG_MPC85xx_GUTS_OFFSET        (0xE0000)
-#define CFG_MPC85xx_GUTS_ADDR  (CFG_IMMR + CFG_MPC85xx_GUTS_OFFSET)
-
 #define PORDEVSR_PCI   (0x00800000)    /* PCI Mode */
 
-typedef struct immap {
-       ccsr_local_ecm_t        im_local_ecm;
-       ccsr_ddr_t              im_ddr;
-       ccsr_i2c_t              im_i2c;
-       ccsr_duart_t            im_duart;
-       ccsr_lbc_t              im_lbc;
-       ccsr_pcix_t             im_pcix;
-       ccsr_pcix_t             im_pcix2;
-       char                    reserved[90112];
-       ccsr_l2cache_t          im_l2cache;
-       ccsr_dma_t              im_dma;
-       ccsr_tsec_t             im_tsec1;
-       ccsr_tsec_t             im_tsec2;
-       ccsr_pic_t              im_pic;
-} immap_t;
-
+#define CFG_MPC85xx_GUTS_OFFSET        (0xE0000)
+#define CFG_MPC85xx_GUTS_ADDR  (CFG_IMMR + CFG_MPC85xx_GUTS_OFFSET)
+#define CFG_MPC85xx_ECM_OFFSET (0x0000)
+#define CFG_MPC85xx_ECM_ADDR   (CFG_IMMR + CFG_MPC85xx_ECM_OFFSET)
+#define CFG_MPC85xx_DDR_OFFSET (0x2000)
+#define CFG_MPC85xx_DDR_ADDR   (CFG_IMMR + CFG_MPC85xx_DDR_OFFSET)
+#define CFG_MPC85xx_LBC_OFFSET (0x5000)
+#define CFG_MPC85xx_LBC_ADDR   (CFG_IMMR + CFG_MPC85xx_LBC_OFFSET)
+#define CFG_MPC85xx_PCIX_OFFSET        (0x8000)
+#define CFG_MPC85xx_PCIX_ADDR  (CFG_IMMR + CFG_MPC85xx_PCIX_OFFSET)
+#define CFG_MPC85xx_PCIX2_OFFSET       (0x9000)
+#define CFG_MPC85xx_PCIX2_ADDR (CFG_IMMR + CFG_MPC85xx_PCIX2_OFFSET)
+#define CFG_MPC85xx_L2_OFFSET  (0x20000)
+#define CFG_MPC85xx_L2_ADDR    (CFG_IMMR + CFG_MPC85xx_L2_OFFSET)
+#define CFG_MPC85xx_DMA_OFFSET (0x21000)
+#define CFG_MPC85xx_DMA_ADDR   (CFG_IMMR + CFG_MPC85xx_DMA_OFFSET)
+#define CFG_MPC85xx_PIC_OFFSET (0x40000)
+#define CFG_MPC85xx_PIC_ADDR   (CFG_IMMR + CFG_MPC85xx_PIC_OFFSET)
 #define CFG_MPC85xx_CPM_OFFSET (0x80000)
 #define CFG_MPC85xx_CPM_ADDR   (CFG_IMMR + CFG_MPC85xx_CPM_OFFSET)
 
-extern immap_t  *immr;
-
 #endif /*__IMMAP_85xx__*/