clk: qcom: drop CLK_SET_RATE_GATE from sdc clocks
authorJerome Brunet <jbrunet@baylibre.com>
Tue, 19 Jun 2018 13:40:50 +0000 (15:40 +0200)
committerMichael Turquette <mturquette@baylibre.com>
Tue, 19 Jun 2018 17:02:28 +0000 (10:02 -0700)
the mmci driver (drivers/mmc/host/mmci.c) does the following sequence:
* clk_prepare_enable()
* clk_set_rate()

on SDCx_clk which is a children of SDCx_src. SDCx_src has
CLK_SET_RATE_GATE so this sequence should not be allowed but this was not
enforced. IOW, the flag is ignored. Dropping the flag won't change
anything to the current behaviour of the platform.

CLK_SET_RATE_GATE is being fixed and enforced now. If the flag was kept,
the mmci driver would receive -EBUSY when calling clk_set_rate()

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20180619134051.16726-2-jbrunet@baylibre.com

drivers/clk/qcom/gcc-ipq806x.c
drivers/clk/qcom/gcc-mdm9615.c
drivers/clk/qcom/gcc-msm8660.c
drivers/clk/qcom/gcc-msm8960.c

index 28eb200..5f61225 100644 (file)
@@ -1220,7 +1220,6 @@ static struct clk_rcg sdc1_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1269,7 +1268,6 @@ static struct clk_rcg sdc3_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1353,7 +1351,6 @@ static struct clk_rcg tsif_ref_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
index b99dd40..849046f 100644 (file)
@@ -947,7 +947,6 @@ static struct clk_rcg sdc1_src = {
                        .parent_names = gcc_cxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -996,7 +995,6 @@ static struct clk_rcg sdc2_src = {
                        .parent_names = gcc_cxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
index c347a0d..7e930e2 100644 (file)
@@ -1558,7 +1558,6 @@ static struct clk_rcg sdc1_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1607,7 +1606,6 @@ static struct clk_rcg sdc2_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1656,7 +1654,6 @@ static struct clk_rcg sdc3_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1705,7 +1702,6 @@ static struct clk_rcg sdc4_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1754,7 +1750,6 @@ static struct clk_rcg sdc5_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
index eb551c7..fd495e0 100644 (file)
@@ -1628,7 +1628,6 @@ static struct clk_rcg sdc1_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1677,7 +1676,6 @@ static struct clk_rcg sdc2_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1726,7 +1724,6 @@ static struct clk_rcg sdc3_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1775,7 +1772,6 @@ static struct clk_rcg sdc4_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };
@@ -1824,7 +1820,6 @@ static struct clk_rcg sdc5_src = {
                        .parent_names = gcc_pxo_pll8,
                        .num_parents = 2,
                        .ops = &clk_rcg_ops,
-                       .flags = CLK_SET_RATE_GATE,
                },
        }
 };