return count;
}
+static ssize_t lcd_mipi_state_debug_show(struct class *class,
+ struct class_attribute *attr, char *buf)
+{
+ struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver();
+
+ return sprintf(buf, "state: %d, check_en: %d\n",
+ lcd_drv->lcd_config->lcd_control.mipi_config->check_state,
+ lcd_drv->lcd_config->lcd_control.mipi_config->check_en);
+}
+
static struct class_attribute lcd_interface_debug_class_attrs[] = {
__ATTR(ttl, 0644,
lcd_ttl_debug_show, lcd_ttl_debug_store),
lcd_phy_debug_show, lcd_phy_debug_store),
};
-static struct class_attribute lcd_mipi_cmd_debug_class_attrs[] = {
+static struct class_attribute lcd_mipi_debug_class_attrs[] = {
__ATTR(mpcmd, 0644,
lcd_mipi_cmd_debug_show, lcd_mipi_cmd_debug_store),
+ __ATTR(mpstate, 0644, lcd_mipi_state_debug_show, NULL),
};
int lcd_class_creat(void)
break;
case LCD_MIPI:
for (i = 0; i < ARRAY_SIZE
- (lcd_mipi_cmd_debug_class_attrs); i++) {
+ (lcd_mipi_debug_class_attrs); i++) {
if (class_create_file(lcd_drv->lcd_debug_class,
- &lcd_mipi_cmd_debug_class_attrs[i])) {
- LCDERR("create mipi_cmd debug attr %s fail\n",
- lcd_mipi_cmd_debug_class_attrs[
- i].attr.name);
+ &lcd_mipi_debug_class_attrs[i])) {
+ LCDERR("create mipi debug attr %s fail\n",
+ lcd_mipi_debug_class_attrs[i].attr.name);
}
}
break;
LCDPR("color_fmt = %d\n",
pconf->lcd_control.vbyone_config->color_fmt);
} else if (pconf->lcd_basic.lcd_type == LCD_MIPI) {
+ if (pconf->lcd_control.mipi_config->check_en) {
+ LCDPR("check_reg = 0x%02x\n",
+ pconf->lcd_control.mipi_config->check_reg);
+ LCDPR("check_cnt = %d\n",
+ pconf->lcd_control.mipi_config->check_cnt);
+ }
LCDPR("mipi_lane_num = %d\n",
pconf->lcd_control.mipi_config->lane_num);
LCDPR("bit_rate_max = %d\n",
}
break;
case LCD_MIPI:
+ ret = of_property_read_u32_array(child, "check_state",
+ ¶[0], 2);
+ if (ret) {
+ if (lcd_debug_print_flag)
+ LCDPR("failed to get check_state\n");
+ pconf->lcd_control.mipi_config->check_en = 0;
+ } else {
+ pconf->lcd_control.mipi_config->check_en = 1;
+ pconf->lcd_control.mipi_config->check_reg =
+ (unsigned char)(para[0]);
+ pconf->lcd_control.mipi_config->check_cnt =
+ (unsigned char)(para[1]);
+ }
+
ret = of_property_read_u32_array(child, "mipi_attr",
¶[0], 8);
if (ret) {
factor = dconf->factor_numerator;
factor = ((factor * 1000 / dconf->factor_denominator) + 5) / 10;
+ if (dconf->check_en) {
+ pr_info("MIPI DSI check state:\n"
+ " check_reg: 0x%02x\n"
+ " check_cnt: %d\n"
+ " check_state %d\n\n",
+ dconf->check_reg, dconf->check_cnt, dconf->check_state);
+ }
+
pr_info("MIPI DSI Config:\n"
" lane num: %d\n"
" bit rate max: %dMHz\n"
* Function: wait_bta_ack
* Poll to check if the BTA ack is finished
*/
-static void wait_bta_ack(void)
+static int wait_bta_ack(void)
{
- unsigned int phy_status, i;
+ unsigned int phy_status;
+ int i;
/* Check if phydirection is RX */
i = CMD_TIMEOUT_CNT;
i--;
phy_status = dsi_host_read(MIPI_DSI_DWC_PHY_STATUS_OS);
} while ((((phy_status & 0x2) >> BIT_PHY_DIRECTION) == 0x0) && (i > 0));
- if (i == 0)
+ if (i == 0) {
LCDERR("phy direction error: RX\n");
+ return -1;
+ }
/* Check if phydirection is return to TX */
i = CMD_TIMEOUT_CNT;
udelay(10);
i--;
phy_status = dsi_host_read(MIPI_DSI_DWC_PHY_STATUS_OS);
- } while (((phy_status & 0x2) >> BIT_PHY_DIRECTION) == 0x1);
- if (i == 0)
+ } while ((((phy_status & 0x2) >> BIT_PHY_DIRECTION) == 0x1) && (i > 0));
+ if (i == 0) {
LCDERR("phy direction error: TX\n");
+ return -1;
+ }
+
+ return 0;
}
/* *************************************************************
{
unsigned int d_para[2], read_data;
unsigned int i, j, done;
+ int ret = 0;
switch (req->data_type) {
case DT_GEN_RD_1:
(d_para[0] << BIT_GEN_WC_LSBYTE) |
(((unsigned int)req->vc_id) << BIT_GEN_VC) |
(((unsigned int)req->data_type) << BIT_GEN_DT)));
- wait_bta_ack();
+ ret = wait_bta_ack();
+ if (ret)
+ return -1;
+
i = 0;
done = 0;
while (done == 0) {
{
unsigned int d_command, read_data;
unsigned int i, j, done;
+ int ret = 0;
d_command = ((unsigned int)req->payload[2]) & 0xff;
(d_command << BIT_GEN_WC_LSBYTE) |
(((unsigned int)req->vc_id) << BIT_GEN_VC) |
(((unsigned int)req->data_type) << BIT_GEN_DT)));
- wait_bta_ack();
+ ret = wait_bta_ack();
+ if (ret)
+ return -1;
+
i = 0;
done = 0;
while (done == 0) {
* Function: dsi_read_single
* Supported Data Type: DT_GEN_RD_0, DT_GEN_RD_1, DT_GEN_RD_2,
* DT_DCS_RD_0
- * Return: data count
+ * Return: data count, -1 for error
*/
int dsi_read_single(unsigned char *payload, unsigned char *rd_data,
unsigned int rd_byte_len)
break;
}
+ if (num < 0)
+ LCDERR("mipi-dsi read error\n");
+
return num;
}
#else
unsigned int rd_byte_len)
{
LCDPR("Don't support mipi-dsi read command\n");
- return 0;
+ return -1;
}
#endif
pconf);
}
+static void mipi_dsi_check_state(struct dsi_config_s *dconf,
+ unsigned char reg, int cnt)
+{
+ int ret = 0, i, len;
+ unsigned char *rd_data;
+ unsigned char payload[3] = {DT_GEN_RD_1, 1, 0x04};
+ char str[100];
+
+ LCDPR("%s\n", __func__);
+
+ rd_data = kmalloc_array(cnt, sizeof(unsigned char), GFP_KERNEL);
+ if (rd_data == NULL) {
+ LCDERR("%s: rd_data error\n", __func__);
+ return;
+ }
+
+ payload[2] = reg;
+ ret = dsi_read_single(payload, rd_data, cnt);
+ if (ret < 0) {
+ dconf->check_state = 0;
+ lcd_vcbus_setb(L_VCOM_VS_ADDR, 0, 12, 1);
+ kfree(rd_data);
+ return;
+ }
+
+ dconf->check_state = 1;
+ lcd_vcbus_setb(L_VCOM_VS_ADDR, 1, 12, 1);
+ len = sprintf(str, "read reg 0x%02x: ", reg);
+ for (i = 0; i < ret; i++) {
+ if (i == 0)
+ len += sprintf(str+len, "0x%02x", rd_data[i]);
+ else
+ len += sprintf(str+len, ",0x%02x", rd_data[i]);
+ }
+ pr_info("%s\n", str);
+
+ kfree(rd_data);
+}
+
static void mipi_dsi_link_on(struct lcd_config_s *pconf)
{
unsigned int op_mode_init, op_mode_disp;
op_mode_init = dconf->operation_mode_init;
op_mode_disp = dconf->operation_mode_display;
+ if (dconf->check_en)
+ mipi_dsi_check_state(dconf, dconf->check_reg, dconf->check_cnt);
+
#ifdef CONFIG_AMLOGIC_LCD_EXTERN
if (dconf->extern_init < LCD_EXTERN_INDEX_INVALID) {
lcd_ext = aml_lcd_extern_get_driver(dconf->extern_init);
lcd_ext->config.table_init_on);
LCDPR("[extern]%s dsi init on\n",
lcd_ext->config.name);
+ goto mipi_dsi_link_disp;
}
}
}
LCDPR("dsi init on\n");
}
+mipi_dsi_link_disp:
if (op_mode_disp != op_mode_init) {
set_mipi_dsi_host(MIPI_DSI_VIRTUAL_CHAN_ID,
0, /* Chroma sub sample, only for
/* phy config */
mipi_dsi_phy_config(&dsi_phy_config, dconf->bit_rate);
- if (lcd_debug_print_flag)
- mipi_dsi_host_print_info(pconf);
+ /* update check_state */
+ if (dconf->check_en)
+ dconf->check_state = lcd_vcbus_getb(L_VCOM_VS_ADDR, 12, 1);
}
static void mipi_dsi_host_on(struct lcd_config_s *pconf)
dsi_phy_config_set(pconf);
mipi_dsi_link_on(pconf);
+
+ if (lcd_debug_print_flag)
+ mipi_dsi_host_print_info(pconf);
}
static void mipi_dsi_host_off(void)