drm/i915: Fix indentation for intel_ddi_clk_select
authorChris Wilson <chris@chris-wilson.co.uk>
Tue, 19 Dec 2017 11:26:49 +0000 (11:26 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 19 Dec 2017 12:44:41 +0000 (12:44 +0000)
drivers/gpu/drm/i915/intel_ddi.c:2098 intel_ddi_clk_select() warn: inconsistent indenting

References: 8edcda1266f9 ("drm/i915: Protect DDI port to DPLL map from theoretical race.")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171219112649.9388-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/intel_ddi.c

index f624ba8..f51645a 100644 (file)
@@ -2095,7 +2095,7 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder,
        if (WARN_ON(!pll))
                return;
 
-        mutex_lock(&dev_priv->dpll_lock);
+       mutex_lock(&dev_priv->dpll_lock);
 
        if (IS_CANNONLAKE(dev_priv)) {
                /* Configure DPCLKA_CFGCR0 to map the DPLL to the DDI. */
@@ -2117,7 +2117,7 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder,
                val = I915_READ(DPLL_CTRL2);
 
                val &= ~(DPLL_CTRL2_DDI_CLK_OFF(port) |
-                       DPLL_CTRL2_DDI_CLK_SEL_MASK(port));
+                        DPLL_CTRL2_DDI_CLK_SEL_MASK(port));
                val |= (DPLL_CTRL2_DDI_CLK_SEL(pll->id, port) |
                        DPLL_CTRL2_DDI_SEL_OVERRIDE(port));