armv7-r: do not allocate MPU region manually

MPU region configurations are specific to chipset or boards. This means
that the number of regions supported or how to configure each region
depends on the chipset or board. In other words, common OS layer should
not assume which region would have a specific usage. For this reasons,
current implementation of MPU is completely wrong and broken.

As a preparation step for correcting it, this commit fixes the code that
manually allocates MPU region identifiers. mpu_allocregion() should be
used instead. This change might break the protected build, but it was
already broken and malfunctioning by itself. So, this commit does not
introduce any harm or cause any functional differences at all, though it
seems to alter quite a lot.

It also removes redundant calls to mpu_control().

Change-Id: I747a87c566f671ad198c3e20a97e9f929cb45eb5
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>

diff --git a/os/arch/arm/src/armv7-r/mpu.h b/os/arch/arm/src/armv7-r/mpu.h
index 9b22ebd..fba5a43 100644 (file)
--- a/os/arch/arm/src/armv7-r/mpu.h
+++ b/os/arch/arm/src/armv7-r/mpu.h
@@ -492,14 +492,13 @@ static inline void mpu_control(bool enable)
  ****************************************************************************/
 
 #if defined(CONFIG_ARMV7R_HAVE_ICACHE) || defined(CONFIG_ARMV7R_DCACHE)
-static inline void mpu_priv_stronglyordered(uintptr_t base, size_t size, int region)
+static inline void mpu_priv_stronglyordered(uintptr_t base, size_t size)
 {
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -532,14 +531,13 @@ static inline void mpu_priv_stronglyordered(uintptr_t base, size_t size, int reg
  *
  ****************************************************************************/
 
-static inline void mpu_user_flash(uintptr_t base, size_t size, int region)
+static inline void mpu_user_flash(uintptr_t base, size_t size)
 {
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -571,14 +569,13 @@ static inline void mpu_user_flash(uintptr_t base, size_t size, int region)
  *
  ****************************************************************************/
 
-static inline void mpu_priv_noncache(uintptr_t base, size_t size, int region)
+static inline void mpu_priv_noncache(uintptr_t base, size_t size)
 {
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -613,14 +610,13 @@ static inline void mpu_priv_noncache(uintptr_t base, size_t size, int region)
  *
  ****************************************************************************/
 
-static inline void mpu_priv_flash(uintptr_t base, size_t size, int region)
+static inline void mpu_priv_flash(uintptr_t base, size_t size)
 {
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -650,14 +646,13 @@ static inline void mpu_priv_flash(uintptr_t base, size_t size, int region)
  *
  ****************************************************************************/
 
-static inline void mpu_user_intsram(uintptr_t base, size_t size, int region)
+static inline void mpu_user_intsram(uintptr_t base, size_t size)
 {
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -690,13 +685,11 @@ static inline void mpu_user_intsram(uintptr_t base, size_t size, int region)
 
 static inline void mpu_priv_intsram(uintptr_t base, size_t size)
 {
-       unsigned int region = MPU_REG_KERN_DATA;
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -727,14 +720,13 @@ static inline void mpu_priv_intsram(uintptr_t base, size_t size)
  *
  ****************************************************************************/
 
-static inline void mpu_user_extsram(uintptr_t base, size_t size, int region)
+static inline void mpu_user_extsram(uintptr_t base, size_t size)
 {
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -768,13 +760,11 @@ static inline void mpu_user_extsram(uintptr_t base, size_t size, int region)
 
 static inline void mpu_priv_extsram(uintptr_t base, size_t size)
 {
-       unsigned int region = MPU_REG_KERN_DATA;
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -808,13 +798,11 @@ static inline void mpu_priv_extsram(uintptr_t base, size_t size)
 
 static inline void mpu_peripheral(uintptr_t base, size_t size)
 {
-       unsigned int region = MPU_REG_KERN_FLASH;
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -847,14 +835,13 @@ static inline void mpu_peripheral(uintptr_t base, size_t size)
  *
  ****************************************************************************/
 
-static inline void mpu_priv_intsram_wb(uintptr_t base, size_t size, int region)
+static inline void mpu_priv_intsram_wb(uintptr_t base, size_t size)
 {
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -879,14 +866,13 @@ static inline void mpu_priv_intsram_wb(uintptr_t base, size_t size, int region)
        mpu_set_drsr(regval);
 }
 
-static inline void mpu_user_intsram_ro(uintptr_t base, size_t size, int region)
+static inline void mpu_user_intsram_ro(uintptr_t base, size_t size)
 {
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 
@@ -920,14 +906,13 @@ static inline void mpu_user_intsram_ro(uintptr_t base, size_t size, int region)
  *
  ****************************************************************************/
 
-static inline void mpu_user_intsram_wb(uintptr_t base, size_t size, int region)
+static inline void mpu_user_intsram_wb(uintptr_t base, size_t size)
 {
+       unsigned int region = mpu_allocregion();
        uint32_t regval;
        uint8_t l2size;
        uint8_t subregions;
 
-       DEBUGASSERT(region < (uintptr_t)CONFIG_ARMV7M_MPU_NREGIONS);
-
        /* Select the region */
        mpu_set_rgnr(region);
 

diff --git a/os/arch/arm/src/s5j/s5j_boot.c b/os/arch/arm/src/s5j/s5j_boot.c
index 3c03f37..4cd8e52 100644 (file)
--- a/os/arch/arm/src/s5j/s5j_boot.c
+++ b/os/arch/arm/src/s5j/s5j_boot.c
@@ -109,13 +109,11 @@ int s5j_mpu_initialize(void)
 {
        uint32_t base;
        uint32_t size;
-       int region = 0;
 
        /* flash region
         * region 0 : 0x0400_0000 ++ 4MB  BL1 + TinyAra OS + SSS F/W
         */
-
-       mpu_priv_flash(0x0, 0x04000000, region++);
+       mpu_priv_flash(0x0, 0x04000000);
 
        /* S5JT200 memory address in below
         * 0x0202_0000 ~ 0x0215_FFFF  ~1280KB
@@ -125,36 +123,31 @@ int s5j_mpu_initialize(void)
 
        /* access permission for available area */
        /* Region 1, for ISRAM(0x0200_0000++2048KB, RW-WBWA */
-
-       mpu_user_intsram_wb(0x02000000, 0x200000, region++);
+       mpu_user_intsram_wb(0x02000000, 0x200000);
 
        /* Region 2,3, for wifi driver non-$(0x020E_0000++512KB(+128KB), RW-NCNB */
-
-       mpu_priv_noncache(0x020E0000, 0x20000, region++);       // priority higher than region 0, allows overlapping
-       mpu_priv_noncache(0x02100000, 0x80000, region++);       // priority higher than region 0, allows overlapping
+       mpu_priv_noncache(0x020E0000, 0x20000);
+       mpu_priv_noncache(0x02100000, 0x80000);
 
        /*
         * Region 4 for RO in Flash : 0x0400_0000 ++ 4MB, RO-WT
         * BL1 + TinyAra OS + SSS F/W, wifi F/W, CM0 F/W
         */
-
        base = CONFIG_S5J_FLASH_BASE;
-       size = CONFIG_S5J_BOOTLOADER_REGION_SIZE * 1024;        /* 4096*1024 */
-       mpu_priv_flash(base, size, region++);
+       size = CONFIG_S5J_BOOTLOADER_REGION_SIZE * 1024; /* 4096*1024 */
+       mpu_priv_flash(base, size);
 
        /* Region 5, for wifi dedicated area, RW-WBWA, 0x043C_0000 -- 8KB */
-       mpu_user_intsram_wb(CONFIG_NVRAM_WIFI_START, 8 * 1024, region++);
-       mpu_control(true);
+       mpu_user_intsram_wb(CONFIG_NVRAM_WIFI_START, 8 * 1024);
 
 #ifdef CONFIG_FS_SMARTFS
        /*
         * Region 6, FILE SYSTEM : 0x0440_0000 ++ 4MB - 256KB
         * filesystem - smartfs
         */
-
        base = CONFIG_S5J_FLASH_BASE + CONFIG_S5J_BOOTLOADER_REGION_SIZE * 1024;
        size = (CONFIG_S5J_FLASH_SIZE - CONFIG_S5J_BOOTLOADER_REGION_SIZE) * 1024;
-       mpu_user_intsram_wb(base, size, region++);
+       mpu_user_intsram_wb(base, size);
 #endif
 
        /*
@@ -163,18 +156,18 @@ int s5j_mpu_initialize(void)
         */
        base = CONFIG_S5J_FLASH_BASE + (CONFIG_S5J_FLASH_SIZE) * 1024;
        size = 256 * 1024;
-       mpu_user_intsram_wb(base, size, region++);
+       mpu_user_intsram_wb(base, size);
 
        /* region 8, for Sflash Mirror(0x6000_0000, RO) */
-       mpu_priv_flash(0x60000000, CONFIG_S5J_FLASH_SIZE * 1024, region++);
+       mpu_priv_flash(0x60000000, CONFIG_S5J_FLASH_SIZE * 1024);
 
        /* Region 9, for vecotr table(0x8000_0000, RW-STRONG-ORDER */
-       mpu_priv_stronglyordered(0x80000000, 0x10000000, region++);     // SFR access area, set to stronglyorder
-       mpu_control(true);
+       mpu_priv_stronglyordered(0x80000000, 0x10000000);
 
        /* Region 10, for vecotr table(0xFFFF_0000++4KB, RO-WT */
+       mpu_priv_flash(0xFFFF0000, 0x1000);
 
-       mpu_priv_flash(0xFFFF0000, 0x1000, region++);
+       mpu_control(true);
 
        return 0;
 }