ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoM
authorFrieder Schrempf <frieder.schrempf@kontron.de>
Thu, 28 May 2020 14:43:42 +0000 (14:43 +0000)
committerShawn Guo <shawnguo@kernel.org>
Tue, 23 Jun 2020 03:39:21 +0000 (11:39 +0800)
The watchdog's WDOG_ANY signal is used to trigger a POR of the SoC,
if a soft reset is issued. As the SoM hardware connects the WDOG_ANY
and the POR signals, the watchdog node itself and the pin
configuration should be part of the common SoM devicetree.
Let's move it from the baseboard's devicetree to its proper place.

Fixes: 1ea4b76cdfde ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards")
Cc: stable@vger.kernel.org
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi

index f05e91841202744003aadaecea989358f5e45548..53a25fba34f6924b397fb3634112813996ff131d 100644 (file)
        status = "okay";
 };
 
-&wdog1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_wdog>;
-       fsl,ext-reset-output;
-       status = "okay";
-};
-
 &iomuxc {
        pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>;
 
                        MX6UL_PAD_NAND_DATA03__USDHC2_DATA3     0x170f9
                >;
        };
-
-       pinctrl_wdog: wdoggrp {
-               fsl,pins = <
-                       MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY    0x30b0
-               >;
-       };
 };
index a17af4d9bfdf91583d3dee354af18751c41af1c0..fc316408721d02861148e5c1b1e7367d06b9fa5f 100644 (file)
        status = "okay";
 };
 
+&wdog1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdog>;
+       fsl,ext-reset-output;
+       status = "okay";
+};
+
 &iomuxc {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_reset_out>;
                        MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09      0x1b0b0
                >;
        };
+
+       pinctrl_wdog: wdoggrp {
+               fsl,pins = <
+                       MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY    0x30b0
+               >;
+       };
 };