clk: renesas: r8a779g0: Add VIN clocks
authorNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Sat, 11 Feb 2023 14:36:55 +0000 (15:36 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 6 Mar 2023 09:42:14 +0000 (10:42 +0100)
Add the VIN module clocks, which are used by the VIN modules on the
Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230211143655.3809756-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a779g0-cpg-mssr.c

index 0e3c8b1..7cc580d 100644 (file)
@@ -207,6 +207,22 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
        DEF_MOD("tmu3",         716,    R8A779G0_CLK_SASYNCPERD2),
        DEF_MOD("tmu4",         717,    R8A779G0_CLK_SASYNCPERD2),
        DEF_MOD("tpu0",         718,    R8A779G0_CLK_SASYNCPERD4),
+       DEF_MOD("vin00",        730,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin01",        731,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin02",        800,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin03",        801,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin04",        802,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin05",        803,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin06",        804,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin07",        805,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin10",        806,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin11",        807,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin12",        808,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin13",        809,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin14",        810,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin15",        811,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin16",        812,    R8A779G0_CLK_S0D4_VIO),
+       DEF_MOD("vin17",        813,    R8A779G0_CLK_S0D4_VIO),
        DEF_MOD("vspd0",        830,    R8A779G0_CLK_VIOBUSD2),
        DEF_MOD("vspd1",        831,    R8A779G0_CLK_VIOBUSD2),
        DEF_MOD("wdt1:wdt0",    907,    R8A779G0_CLK_R),