usb: xhci: add VLI_TRB_CACHE_BUG quirk

The VL805 fetches up to 4 transfer TRBs at a time. TRB reads don't cross
a 64B boundary, and if a TRB is fetched and is not on a 64B boundary,
the read is sized up to the next 64B boundary.

However the VL805 implements a readahead prefetch for TRBs on a transfer
ring. This fetches the next 64B after any TRB read has happened. Near
the end of a ring segment, the prefetcher can read the first 64B of the
next page in physical memory and this is where the behaviour causes a
bug.

The controller does not tag reads with which endpoint they are for, so
if the start of the next page is a ring segment used by a victim
endpoint, and the victim endpoint is about to fetch TRBs from the start
of the segment, the victim endpoint will read from the prefetched data
and not perform a read to main memory. If the data is stale, the ring
cycle state bit may not be correct and the endpoint will silently halt.

Adjust trbs_per_seg for transfer rings allocated for this controller.

See https://github.com/raspberrypi/linux/issues/4685

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index eb802f21d5468cb9d72e840d5a9143625e258325..47b95013ab98c17c1c3d40a8f77f92cc4d580209 100644 (file)
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -392,6 +392,17 @@ struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
                return ring;
 
        ring->trbs_per_seg = TRBS_PER_SEGMENT;
+       /*
+        * The Via VL805 has a bug where cache readahead will fetch off the end
+        * of a page if the Link TRB of a transfer ring is in the last 4 slots.
+        * Where there are consecutive physical pages containing ring segments,
+        * this can cause a desync between the controller's view of a ring
+        * and the host.
+        */
+       if (xhci->quirks & XHCI_VLI_TRB_CACHE_BUG &&
+           type != TYPE_EVENT && type != TYPE_COMMAND)
+               ring->trbs_per_seg -= 4;
+
        ret = xhci_alloc_segments_for_ring(xhci, &ring->first_seg,
                        &ring->last_seg, num_segs, ring->trbs_per_seg,
                        cycle_state, type, max_packet, flags);

diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 5e95f0da31ad55ebbbd31a29591173f5e3f13390..b68a1ce53435e1f51e8ce9c4eee158a9e577d51f 100644 (file)
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -297,6 +297,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
                xhci->quirks |= XHCI_LPM_SUPPORT;
                xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
                xhci->quirks |= XHCI_AVOID_DQ_ON_LINK;
+               xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG;
        }
 
        if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&

diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 41ddff3cd7466adb8d2ffd696a97ee391426cf11..ea787da2441ee53ef0c185e7aabc1c4acd1af3bb 100644 (file)
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1902,6 +1902,7 @@ struct xhci_hcd {
 #define XHCI_BROKEN_D3COLD     BIT_ULL(41)
 #define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
 #define XHCI_AVOID_DQ_ON_LINK  BIT_ULL(43)
+#define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(44)
 
        unsigned int            num_active_eps;
        unsigned int            limit_active_eps;