arm64: mm: Add additional parameter to uaccess_ttbr0_disable
authorChristoffer Dall <christoffer.dall@linaro.org>
Wed, 17 Jan 2018 11:35:27 +0000 (12:35 +0100)
committerChristoffer Dall <christoffer.dall@linaro.org>
Wed, 17 Jan 2018 12:57:49 +0000 (13:57 +0100)
Add an extra temporary register parameter to uaccess_ttbr0_disable which
is about to be required for arm64 PAN support.

This patch doesn't introduce any functional change but ensures that the
kernel compiles once the KVM/ARM tree is merged with the arm64 tree by
ensuring a trivially mergable conflict with commit
6b88a32c7af68895134872cdec3b6bfdb532d94e
("arm64: kpti: Fix the interaction between ASID switching and software PAN").

Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
arch/arm64/include/asm/asm-uaccess.h
arch/arm64/lib/clear_user.S
arch/arm64/lib/copy_from_user.S
arch/arm64/lib/copy_in_user.S
arch/arm64/lib/copy_to_user.S
arch/arm64/mm/cache.S
arch/arm64/xen/hypercall.S

index b67563d..0306426 100644 (file)
@@ -25,7 +25,7 @@
        isb
        .endm
 
-       .macro  uaccess_ttbr0_disable, tmp1
+       .macro  uaccess_ttbr0_disable, tmp1, tmp2
 alternative_if_not ARM64_HAS_PAN
        __uaccess_ttbr0_disable \tmp1
 alternative_else_nop_endif
@@ -39,7 +39,7 @@ alternative_if_not ARM64_HAS_PAN
 alternative_else_nop_endif
        .endm
 #else
-       .macro  uaccess_ttbr0_disable, tmp1
+       .macro  uaccess_ttbr0_disable, tmp1, tmp2
        .endm
 
        .macro  uaccess_ttbr0_enable, tmp1, tmp2, tmp3
@@ -49,8 +49,8 @@ alternative_else_nop_endif
 /*
  * These macros are no-ops when UAO is present.
  */
-       .macro  uaccess_disable_not_uao, tmp1
-       uaccess_ttbr0_disable \tmp1
+       .macro  uaccess_disable_not_uao, tmp1, tmp2
+       uaccess_ttbr0_disable \tmp1, \tmp2
 alternative_if ARM64_ALT_PAN_NOT_UAO
        SET_PSTATE_PAN(1)
 alternative_else_nop_endif
index e88fb99..8932e5f 100644 (file)
@@ -50,7 +50,7 @@ uao_user_alternative 9f, strh, sttrh, wzr, x0, 2
        b.mi    5f
 uao_user_alternative 9f, strb, sttrb, wzr, x0, 0
 5:     mov     x0, #0
-       uaccess_disable_not_uao x2
+       uaccess_disable_not_uao x2, x3
        ret
 ENDPROC(__clear_user)
 
index 4b5d826..bc10863 100644 (file)
@@ -67,7 +67,7 @@ ENTRY(__arch_copy_from_user)
        uaccess_enable_not_uao x3, x4
        add     end, x0, x2
 #include "copy_template.S"
-       uaccess_disable_not_uao x3
+       uaccess_disable_not_uao x3, x4
        mov     x0, #0                          // Nothing to copy
        ret
 ENDPROC(__arch_copy_from_user)
index b24a830..e6dd59d 100644 (file)
@@ -68,7 +68,7 @@ ENTRY(raw_copy_in_user)
        uaccess_enable_not_uao x3, x4
        add     end, x0, x2
 #include "copy_template.S"
-       uaccess_disable_not_uao x3
+       uaccess_disable_not_uao x3, x4
        mov     x0, #0
        ret
 ENDPROC(raw_copy_in_user)
index 351f076..bd20f9f 100644 (file)
@@ -66,7 +66,7 @@ ENTRY(__arch_copy_to_user)
        uaccess_enable_not_uao x3, x4
        add     end, x0, x2
 #include "copy_template.S"
-       uaccess_disable_not_uao x3
+       uaccess_disable_not_uao x3, x4
        mov     x0, #0
        ret
 ENDPROC(__arch_copy_to_user)
index 5a52811..758bde7 100644 (file)
@@ -63,7 +63,7 @@ user_alt 9f, "dc cvau, x4",  "dc civac, x4",  ARM64_WORKAROUND_CLEAN_CACHE
        invalidate_icache_by_line x0, x1, x2, x3, 9f
        mov     x0, #0
 1:
-       uaccess_ttbr0_disable x1
+       uaccess_ttbr0_disable x1, x2
        ret
 9:
        mov     x0, #-EFAULT
@@ -85,7 +85,7 @@ ENTRY(invalidate_icache_range)
        invalidate_icache_by_line x0, x1, x2, x3, 2f
        mov     x0, xzr
 1:
-       uaccess_ttbr0_disable x1
+       uaccess_ttbr0_disable x1, x2
        ret
 2:
        mov     x0, #-EFAULT
index acdbd2c..c5f05c4 100644 (file)
@@ -107,6 +107,6 @@ ENTRY(privcmd_call)
        /*
         * Disable userspace access from kernel once the hyp call completed.
         */
-       uaccess_ttbr0_disable x6
+       uaccess_ttbr0_disable x6, x7
        ret
 ENDPROC(privcmd_call);