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spi: tegra210-quad: Fix validate combined sequence
author
Krishna Yarlagadda
<kyarlagadda@nvidia.com>
Fri, 24 Feb 2023 16:40:34 +0000
(22:10 +0530)
committer
Mark Brown
<broonie@kernel.org>
Fri, 24 Feb 2023 17:31:49 +0000
(17:31 +0000)
Check for non dma transfers that do not fit in FIFO has issue and skips
combined sequence for Tegra234 & Tegra241 which does not have GPCDMA.
Fixes:
1b8342cc4a38
("spi: tegra210-quad: combined sequence mode")
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link:
https://lore.kernel.org/r/20230224164034.56933-1-kyarlagadda@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/spi-tegra210-quad.c
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diff --git
a/drivers/spi/spi-tegra210-quad.c
b/drivers/spi/spi-tegra210-quad.c
index
258e3b8
..
9aaca22
100644
(file)
--- a/
drivers/spi/spi-tegra210-quad.c
+++ b/
drivers/spi/spi-tegra210-quad.c
@@
-1297,7
+1297,7
@@
static bool tegra_qspi_validate_cmb_seq(struct tegra_qspi *tqspi,
if (xfer->len > 4 || xfer->len < 3)
return false;
xfer = list_next_entry(xfer, transfer_list);
- if (!tqspi->soc_data->has_dma
||
xfer->len > (QSPI_FIFO_DEPTH << 2))
+ if (!tqspi->soc_data->has_dma
&&
xfer->len > (QSPI_FIFO_DEPTH << 2))
return false;
return true;