drm/vc4: add tracepoints for CL submissions

Trace submit_cl_ioctl and related IRQs for CL submission and bin/render
jobs execution. It might be helpful to get a rendering timeline and
track job throttling.

Signed-off-by: Melissa Wen <mwen@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20220201212651.zhltjmaokisffq3x@mail.igalia.com

diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c
index 445d3bab89e0a27c421c2abd64164050513b362c..4abf10b66fe8fd8f250e2fd52c2133383c9f4f8a 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_gem.c
+++ b/drivers/gpu/drm/vc4/vc4_gem.c
@@ -485,6 +485,8 @@ again:
         * immediately move it to the to-be-rendered queue.
         */
        if (exec->ct0ca != exec->ct0ea) {
+               trace_vc4_submit_cl(dev, false, exec->seqno, exec->ct0ca,
+                                   exec->ct0ea);
                submit_cl(dev, 0, exec->ct0ca, exec->ct0ea);
        } else {
                struct vc4_exec_info *next;
@@ -519,6 +521,7 @@ vc4_submit_next_render_job(struct drm_device *dev)
         */
        vc4_flush_texture_caches(dev);
 
+       trace_vc4_submit_cl(dev, true, exec->seqno, exec->ct1ca, exec->ct1ea);
        submit_cl(dev, 1, exec->ct1ca, exec->ct1ea);
 }
 
@@ -1135,6 +1138,10 @@ vc4_submit_cl_ioctl(struct drm_device *dev, void *data,
        struct dma_fence *in_fence;
        int ret = 0;
 
+       trace_vc4_submit_cl_ioctl(dev, args->bin_cl_size,
+                                 args->shader_rec_size,
+                                 args->bo_handle_count);
+
        if (!vc4->v3d) {
                DRM_DEBUG("VC4_SUBMIT_CL with no VC4 V3D probed\n");
                return -ENODEV;

diff --git a/drivers/gpu/drm/vc4/vc4_irq.c b/drivers/gpu/drm/vc4/vc4_irq.c
index 20fa8e34c20b89d6dddbb6a5318f60a00d92f0dd..4342fb43e8c1d088700675fbbceaf3061ce591a8 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_irq.c
+++ b/drivers/gpu/drm/vc4/vc4_irq.c
@@ -51,6 +51,7 @@
 
 #include "vc4_drv.h"
 #include "vc4_regs.h"
+#include "vc4_trace.h"
 
 #define V3D_DRIVER_IRQS (V3D_INT_OUTOMEM | \
                         V3D_INT_FLDONE | \
@@ -123,6 +124,8 @@ vc4_irq_finish_bin_job(struct drm_device *dev)
        if (!exec)
                return;
 
+       trace_vc4_bcl_end_irq(dev, exec->seqno);
+
        vc4_move_job_to_render(dev, exec);
        next = vc4_first_bin_job(vc4);
 
@@ -161,6 +164,8 @@ vc4_irq_finish_render_job(struct drm_device *dev)
        if (!exec)
                return;
 
+       trace_vc4_rcl_end_irq(dev, exec->seqno);
+
        vc4->finished_seqno++;
        list_move_tail(&exec->head, &vc4->job_done_list);
 

diff --git a/drivers/gpu/drm/vc4/vc4_trace.h b/drivers/gpu/drm/vc4/vc4_trace.h
index 1cccde0b09a7cc77c78b92de83df48ad300e87a3..7f4c49e7e0113b33f149051dae25182117a13e18 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_trace.h
+++ b/drivers/gpu/drm/vc4/vc4_trace.h
@@ -52,6 +52,101 @@ TRACE_EVENT(vc4_wait_for_seqno_end,
                      __entry->dev, __entry->seqno)
 );
 
+TRACE_EVENT(vc4_submit_cl_ioctl,
+           TP_PROTO(struct drm_device *dev, u32 bin_cl_size, u32 shader_rec_size, u32 bo_count),
+           TP_ARGS(dev, bin_cl_size, shader_rec_size, bo_count),
+
+           TP_STRUCT__entry(
+                            __field(u32, dev)
+                            __field(u32, bin_cl_size)
+                            __field(u32, shader_rec_size)
+                            __field(u32, bo_count)
+                            ),
+
+           TP_fast_assign(
+                          __entry->dev = dev->primary->index;
+                          __entry->bin_cl_size = bin_cl_size;
+                          __entry->shader_rec_size = shader_rec_size;
+                          __entry->bo_count = bo_count;
+                          ),
+
+           TP_printk("dev=%u, bin_cl_size=%u, shader_rec_size=%u, bo_count=%u",
+                     __entry->dev,
+                     __entry->bin_cl_size,
+                     __entry->shader_rec_size,
+                     __entry->bo_count)
+);
+
+TRACE_EVENT(vc4_submit_cl,
+           TP_PROTO(struct drm_device *dev, bool is_render,
+                    uint64_t seqno,
+                    u32 ctnqba, u32 ctnqea),
+           TP_ARGS(dev, is_render, seqno, ctnqba, ctnqea),
+
+           TP_STRUCT__entry(
+                            __field(u32, dev)
+                            __field(bool, is_render)
+                            __field(u64, seqno)
+                            __field(u32, ctnqba)
+                            __field(u32, ctnqea)
+                            ),
+
+           TP_fast_assign(
+                          __entry->dev = dev->primary->index;
+                          __entry->is_render = is_render;
+                          __entry->seqno = seqno;
+                          __entry->ctnqba = ctnqba;
+                          __entry->ctnqea = ctnqea;
+                          ),
+
+           TP_printk("dev=%u, %s, seqno=%llu, 0x%08x..0x%08x",
+                     __entry->dev,
+                     __entry->is_render ? "RCL" : "BCL",
+                     __entry->seqno,
+                     __entry->ctnqba,
+                     __entry->ctnqea)
+);
+
+TRACE_EVENT(vc4_bcl_end_irq,
+           TP_PROTO(struct drm_device *dev,
+                    uint64_t seqno),
+           TP_ARGS(dev, seqno),
+
+           TP_STRUCT__entry(
+                            __field(u32, dev)
+                            __field(u64, seqno)
+                            ),
+
+           TP_fast_assign(
+                          __entry->dev = dev->primary->index;
+                          __entry->seqno = seqno;
+                          ),
+
+           TP_printk("dev=%u, seqno=%llu",
+                     __entry->dev,
+                     __entry->seqno)
+);
+
+TRACE_EVENT(vc4_rcl_end_irq,
+           TP_PROTO(struct drm_device *dev,
+                    uint64_t seqno),
+           TP_ARGS(dev, seqno),
+
+           TP_STRUCT__entry(
+                            __field(u32, dev)
+                            __field(u64, seqno)
+                            ),
+
+           TP_fast_assign(
+                          __entry->dev = dev->primary->index;
+                          __entry->seqno = seqno;
+                          ),
+
+           TP_printk("dev=%u, seqno=%llu",
+                     __entry->dev,
+                     __entry->seqno)
+);
+
 #endif /* _VC4_TRACE_H_ */
 
 /* This part must be outside protection */