encoding = 0;
if (instr->opcode == aco_opcode::v_interp_mov_f32) {
encoding = 0x3 & instr->operands[0].constantValue();
+ } else if (instr->opcode == aco_opcode::v_writelane_b32_e64) {
+ encoding |= instr->operands[0].physReg() << 0;
+ encoding |= instr->operands[1].physReg() << 9;
+ /* Encoding src2 works fine with hardware but breaks some disassemblers. */
} else {
for (unsigned i = 0; i < instr->operands.size(); i++)
encoding |= instr->operands[i].physReg() << (i * 9);
disasm_instr(chip_class chip, LLVMDisasmContextRef disasm, uint32_t* binary, unsigned exec_size,
size_t pos, char* outline, unsigned outline_size)
{
- /* mask out src2 on v_writelane_b32 */
- if (((chip == GFX8 || chip == GFX9) && (binary[pos] & 0xffff8000) == 0xd28a0000) ||
- (chip >= GFX10 && (binary[pos] & 0xffff8000) == 0xd7610000)) {
- binary[pos + 1] = binary[pos + 1] & 0xF803FFFF;
- }
-
size_t l =
LLVMDisasmInstruction(disasm, (uint8_t*)&binary[pos], (exec_size - pos) * sizeof(uint32_t),
pos * 4, outline, outline_size);