arm64: dts: layerscape: Add SFP node for TA 2.1 devices
authorSean Anderson <sean.anderson@seco.com>
Thu, 30 Jun 2022 22:32:05 +0000 (18:32 -0400)
committerShawn Guo <shawnguo@kernel.org>
Tue, 5 Jul 2022 01:05:44 +0000 (09:05 +0800)
This adds an appropriate SFP node for Trust Architecture 2.1 devices.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi

index 7557201..a863022 100644 (file)
                        };
                };
 
+               sfp: efuse@1e80000 {
+                       compatible = "fsl,ls1021a-sfp";
+                       reg = <0x0 0x1e80000 0x0 0x10000>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(4)>;
+                       clock-names = "sfp";
+               };
+
                sec_mon: sec_mon@1e90000 {
                        compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
                                     "fsl,sec-v4.0-mon";
index 6cc959b..ca3d5a9 100644 (file)
                        };
                };
 
+               sfp: efuse@1e80000 {
+                       compatible = "fsl,ls1021a-sfp";
+                       reg = <0x0 0x1e80000 0x0 0x10000>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(4)>;
+                       clock-names = "sfp";
+               };
+
                dcfg: dcfg@1ee0000 {
                        compatible = "fsl,ls1043a-dcfg", "syscon";
                        reg = <0x0 0x1ee0000 0x0 0x10000>;
index 57a147a..feab604 100644 (file)
                        ranges = <0x0 0x5 0x08000000 0x8000000>;
                };
 
+               sfp: efuse@1e80000 {
+                       compatible = "fsl,ls1021a-sfp";
+                       reg = <0x0 0x1e80000 0x0 0x10000>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(4)>;
+                       clock-names = "sfp";
+               };
+
                dcfg: dcfg@1ee0000 {
                        compatible = "fsl,ls1046a-dcfg", "syscon";
                        reg = <0x0 0x1ee0000 0x0 0x1000>;