case MachineOperand::MO_Register:
OS << RISCVInstPrinter::getRegisterName(MO.getReg());
return false;
+ case MachineOperand::MO_GlobalAddress:
+ PrintSymbolOperand(MO, OS);
+ return false;
+ case MachineOperand::MO_BlockAddress: {
+ MCSymbol *Sym = GetBlockAddressSymbol(MO.getBlockAddress());
+ Sym->print(OS, MAI);
+ return false;
+ }
default:
break;
}
; RV64I-NEXT: lw a0, 0(a0)
; RV64I-NEXT: #NO_APP
; RV64I-NEXT: ret
- %1 = tail call i32 asm "lw $0, $1", "=r,*m"(i32* %a) nounwind
+ %1 = tail call i32 asm "lw $0, $1", "=r,*m"(i32* %a)
ret i32 %1
}
ret i32 %1
}
-; TODO: expend tests for more complex constraints, out of range immediates etc
+define void @operand_global() nounwind {
+; RV32I-LABEL: operand_global:
+; RV32I: # %bb.0:
+; RV32I-NEXT: #APP
+; RV32I-NEXT: .8byte gi
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: operand_global:
+; RV64I: # %bb.0:
+; RV64I-NEXT: #APP
+; RV64I-NEXT: .8byte gi
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+ tail call void asm sideeffect ".8byte $0", "i"(i32* @gi)
+ ret void
+}
+
+define void @operand_block_address() nounwind {
+; RV32I-LABEL: operand_block_address:
+; RV32I: # %bb.0:
+; RV32I-NEXT: #APP
+; RV32I-NEXT: j .Ltmp0
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: .Ltmp0: # Block address taken
+; RV32I-NEXT: # %bb.1: # %bb
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: operand_block_address:
+; RV64I: # %bb.0:
+; RV64I-NEXT: #APP
+; RV64I-NEXT: j .Ltmp0
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: .Ltmp0: # Block address taken
+; RV64I-NEXT: # %bb.1: # %bb
+; RV64I-NEXT: ret
+ call void asm sideeffect "j $0", "i"(i8* blockaddress(@operand_block_address, %bb))
+ br label %bb
+bb:
+ ret void
+}
+
+; TODO: expand tests for more complex constraints, out of range immediates etc