ARM64: dts: marvell: cn9310: Use appropriate label for spi1 pins

[ Upstream commit 0878fd86f554ab98aa493996c7e0c72dff58437f ]

Both the CN9130-CRB and CN9130-DB use the SPI1 interface but had the
pinctrl node labelled as "cp0_spi0_pins". Use the label "cp0_spi1_pins"
and update the node name to "cp0-spi-pins-1" to avoid confusion with the
pinctrl options for SPI0.

Fixes: 4c43a41e5b8c ("arm64: dts: cn913x: add device trees for topology B boards")
Fixes: 5c0ee54723f3 ("arm64: dts: add support for Marvell cn9130-crb platform")
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index 32cfb3e..47d45ff 100644 (file)
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -120,7 +120,7 @@
                                       "mpp59", "mpp60", "mpp61";
                        marvell,function = "sdio";
                };
-               cp0_spi0_pins: cp0-spi-pins-0 {
+               cp0_spi1_pins: cp0-spi-pins-1 {
                        marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
                        marvell,function = "spi1";
                };
@@ -170,7 +170,7 @@
 
 &cp0_spi1 {
        pinctrl-names = "default";
-       pinctrl-0 = <&cp0_spi0_pins>;
+       pinctrl-0 = <&cp0_spi1_pins>;
        reg = <0x700680 0x50>,          /* control */
              <0x2000000 0x1000000>;    /* CS0 */
        status = "okay";

diff --git a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
index c7de1ea..6eb6a17 100644 (file)
--- a/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-db.dtsi
@@ -307,7 +307,7 @@
 &cp0_spi1 {
        status = "disabled";
        pinctrl-names = "default";
-       pinctrl-0 = <&cp0_spi0_pins>;
+       pinctrl-0 = <&cp0_spi1_pins>;
        reg = <0x700680 0x50>;
 
        flash@0 {
@@ -371,7 +371,7 @@
                                       "mpp59", "mpp60", "mpp61";
                        marvell,function = "sdio";
                };
-               cp0_spi0_pins: cp0-spi-pins-0 {
+               cp0_spi1_pins: cp0-spi-pins-1 {
                        marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
                        marvell,function = "spi1";
                };