drm/i915/gvt: do not return error on handling force_to_nonpriv registers
authorZhao Yan <yan.y.zhao@intel.com>
Tue, 8 May 2018 06:52:42 +0000 (14:52 +0800)
committerZhi Wang <zhi.a.wang@intel.com>
Sun, 13 May 2018 21:18:55 +0000 (05:18 +0800)
Return error will cause vm hang and enter failsafe mode.
However, we don't want that happen on detecting an wrong force_to_nonpriv
register write.
Therefore, we just omit the wrong write or patch it to default value.

v2: only return 0 on detecting lri write of registers outside whitelist,
but still return error on other error conditions.  (zhenyu wang)

Signed-off-by: Zhao Yan <yan.y.zhao@intel.com>
Reviewed-by: Zhang Yulei <yulei.zhang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
drivers/gpu/drm/i915/gvt/cmd_parser.c
drivers/gpu/drm/i915/gvt/handlers.c

index 737cc82..536cb69 100644 (file)
@@ -828,7 +828,8 @@ static int force_nonpriv_reg_handler(struct parser_exec_state *s,
                        data != nopid) {
                gvt_err("Unexpected forcenonpriv 0x%x LRI write, value=0x%x\n",
                        offset, data);
-               return -EPERM;
+               patch_value(s, cmd_ptr(s, index), nopid);
+               return 0;
        }
        return 0;
 }
index bf2fa60..4b6532f 100644 (file)
@@ -495,7 +495,7 @@ static int force_nonpriv_write(struct intel_vgpu *vgpu,
                gvt_err("vgpu(%d) Invalid FORCE_NONPRIV write %x at offset %x\n",
                        vgpu->id, reg_nonpriv, offset);
 
-       return ret;
+       return 0;
 }
 
 static int ddi_buf_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,