Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
authorLinus Torvalds <torvalds@linux-foundation.org>
Mon, 1 Aug 2016 22:37:45 +0000 (18:37 -0400)
committerLinus Torvalds <torvalds@linux-foundation.org>
Mon, 1 Aug 2016 22:37:45 +0000 (18:37 -0400)
Pull ARM DT updates from Olof Johansson:
 "Device tree contents continue to be the largest branches we submit.
  This time around, some of the contents worth pointing out is:

  New SoC platforms:
   - Freescale i.MX 7Solo
   - Broadcom BCM23550
   - Cirrus Logic EP7209 and EP7211 (clps711x platforms)_
   - Hisilicon HI3519
   - Renesas R8A7792

  Some of the other delta that is sticking out, line-count wise:
   - Exynos moves of IP blocks under an SoC bus, which causes a large
     delta due to indentation changes
   - a new Tegra K1 board: Apalis
   - a bunch of small updates to many Allwinner platforms; new hardware
     support, some cleanup, etc"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (426 commits)
  ARM: dts: sun8i: Add dts file for inet86dz board
  ARM: dts: sun8i: Add dts file for Polaroid MID2407PXE03 tablet
  ARM: dts: sun8i: Use sun8i-reference-design-tablet for ga10h dts
  ARM: dts: sun8i: Use sun8i-reference-design-tablet for polaroid mid2809pxe04
  ARM: dts: sun8i: reference-design-tablet: Add drivevbus-supply
  ARM: dts: Copy sun8i-q8-common.dtsi sun8i-reference-design-tablet.dtsi
  ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for utoo p66 dts
  ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for dit4350 dts
  ARM: dts: sun5i: reference-design-tablet: Remove mention of q8
  ARM: dts: sun5i: reference-design-tablet: Set lradc vref to avcc
  ARM: dts: sun5i: Rename sun5i-q8-common.dtsi sun5i-reference-design-tablet.dtsi
  ARM: dts: sun5i: Move q8 display bits to sun5i-a13-q8-tablet.dts
  ARM: dts: sunxi: Rename sunxi-q8-common.dtsi sunxi-reference-design-tablet.dtsi
  ARM: dts: at91: Don't build unnecessary dtbs
  ARM: dts: at91: sama5d3x: separate motherboard gmac and emac definitions
  ARM: dts: at91: at91sam9g25ek: fix isi endpoint node
  ARM: dts: at91: move isi definition to at91sam9g25ek
  ARM: dts: at91: fix i2c-gpio node name
  ARM: dts: at91: vinco: fix regulator name
  ARM: dts: at91: ariag25 : fix onewire node
  ...

22 files changed:
1  2 
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/am4372.dtsi
arch/arm/boot/dts/bcm-nsp.dtsi
arch/arm/boot/dts/dm814x.dtsi
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/dra74x.dtsi
arch/arm/boot/dts/exynos5250-snow-common.dtsi
arch/arm/boot/dts/exynos5420-peach-pit.dts
arch/arm/boot/dts/imx51-ts4800.dts
arch/arm/boot/dts/omap3-igep0020-common.dtsi
arch/arm/boot/dts/omap3-n900.dts
arch/arm/boot/dts/omap5-board-common.dtsi
arch/arm/boot/dts/qcom-apq8064.dtsi
arch/arm/boot/dts/qcom-ipq4019.dtsi
arch/arm/boot/dts/rk3288.dtsi
arch/arm/boot/dts/sama5d2.dtsi
arch/arm/boot/dts/socfpga_arria10.dtsi
arch/arm/boot/dts/sun8i-h3.dtsi
arch/arm/boot/dts/tegra30-beaver.dts
arch/arm/mach-bcm/platsmp.c
drivers/clk/ti/clk-43xx.c

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                        ocram-ecc@ff8c3000 {
                                compatible = "altr,socfpga-a10-ocram-ecc";
                                reg = <0xff8c3000 0x400>;
+                               interrupts = <1 IRQ_TYPE_LEVEL_HIGH>,
+                                            <33 IRQ_TYPE_LEVEL_HIGH>;
                        };
 +
 +                      emac0-rx-ecc@ff8c0800 {
 +                              compatible = "altr,socfpga-eth-mac-ecc";
 +                              reg = <0xff8c0800 0x400>;
 +                              altr,ecc-parent = <&gmac0>;
 +                              interrupts = <4 IRQ_TYPE_LEVEL_HIGH>,
 +                                           <36 IRQ_TYPE_LEVEL_HIGH>;
 +                      };
 +
 +                      emac0-tx-ecc@ff8c0c00 {
 +                              compatible = "altr,socfpga-eth-mac-ecc";
 +                              reg = <0xff8c0c00 0x400>;
 +                              altr,ecc-parent = <&gmac0>;
 +                              interrupts = <5 IRQ_TYPE_LEVEL_HIGH>,
 +                                           <37 IRQ_TYPE_LEVEL_HIGH>;
 +                      };
                };
  
                rst: rstmgr@ffd05000 {
                                allwinner,drive = <SUN4I_PINCTRL_30_MA>;
                                allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
                        };
+                       uart0_pins_a: uart0@0 {
+                               allwinner,pins = "PA4", "PA5";
+                               allwinner,function = "uart0";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
+                       uart1_pins_a: uart1@0 {
+                               allwinner,pins = "PG6", "PG7", "PG8", "PG9";
+                               allwinner,function = "uart1";
+                               allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+                               allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+                       };
                };
  
 -              ahb_rst: reset@01c202c0 {
 -                      #reset-cells = <1>;
 -                      compatible = "allwinner,sun6i-a31-ahb1-reset";
 -                      reg = <0x01c202c0 0xc>;
 -              };
 -
 -              apb1_rst: reset@01c202d0 {
 -                      #reset-cells = <1>;
 -                      compatible = "allwinner,sun6i-a31-clock-reset";
 -                      reg = <0x01c202d0 0x4>;
 -              };
 -
 -              apb2_rst: reset@01c202d8 {
 -                      #reset-cells = <1>;
 -                      compatible = "allwinner,sun6i-a31-clock-reset";
 -                      reg = <0x01c202d8 0x4>;
 -              };
 -
                timer@01c20c00 {
                        compatible = "allwinner,sun4i-a10-timer";
                        reg = <0x01c20c00 0xa0>;
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@@@ -333,14 -239,8 +291,14 @@@ static const struct smp_operations kona
        .smp_boot_secondary     = kona_boot_secondary,
  };
  CPU_METHOD_OF_DECLARE(bcm_smp_bcm281xx, "brcm,bcm11351-cpu-method",
-                       &bcm_smp_ops);
+                       &kona_smp_ops);
  
 +static const struct smp_operations bcm23550_smp_ops __initconst = {
 +      .smp_boot_secondary     = bcm23550_boot_secondary,
 +};
 +CPU_METHOD_OF_DECLARE(bcm_smp_bcm23550, "brcm,bcm23550",
 +                      &bcm23550_smp_ops);
 +
  static const struct smp_operations nsp_smp_ops __initconst = {
        .smp_prepare_cpus       = bcm_smp_prepare_cpus,
        .smp_boot_secondary     = nsp_boot_secondary,
Simple merge